Re: [PATCH 56/62] drm/i915/bdw: Implement edp PSR workarounds

Jesse Barnes
2013-11-05T17:18:33Z

On Sat, 2 Nov 2013 21:07:54 -0700
Ben Widawsky <benjamin.widawsky@intel.com> wrote:

> This implements a workaround for PSR dealing with some vblank issue.
>
> WaPsrDPAMaskVBlankInSRD && WaPsrDPRSUnmaskVBlankInSRD
>
> v2: forgot to git add bogus whitespace fix
>
> v3: Update with workaround names.
> Use for_each_pipe() and CHICKEN_PIPESL_1(pipe) macro (Ville)
>
> Cc: Art Runyan <arthur.j.runyan@intel.com>
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 6 ++++++
> drivers/gpu/drm/i915/intel_pm.c | 17 +++++++++++++++++
> 2 files changed, 23 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index f97836e..9608f96 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4092,8 +4092,14 @@
> # define CHICKEN3_DGMG_DONE_FIX_DISABLE (1 << 2)
>
> #define CHICKEN_PAR1_1 0x42080
> +#define DPA_MASK_VBLANK_SRD (1 << 15)
> #define FORCE_ARB_IDLE_PLANES (1 << 14)
>
> +#define _CHICKEN_PIPESL_1_A 0x420b0
> +#define _CHICKEN_PIPESL_1_B 0x420b4
> +#define DPRS_MASK_VBLANK_SRD (1 << 0)
> +#define CHICKEN_PIPESL_1(pipe) _PIPE(pipe, _CHICKEN_PIPESL_1_A, _CHICKEN_PIPESL_1_B)
> +
> #define DISP_ARB_CTL 0x45000
> #define DISP_TILE_SURFACE_SWIZZLING (1<<13)
> #define DISP_FBC_WM_DIS (1<<15)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 0245985..63f6e59 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5288,6 +5288,23 @@ static void gen8_init_clock_gating(struct drm_device *dev)
>
> /* WaSwitchSolVfFArbitrationPriority */
> I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) | HSW_ECOCHK_ARB_PRIO_SOL);
> +
> + if (IS_BROADWELL(dev)) {
> + enum pipe i;
> +
> + /* WaPsrDPAMaskVBlankInSRD */
> + I915_WRITE(CHICKEN_PAR1_1,
> + I915_READ(CHICKEN_PAR1_1) | DPA_MASK_VBLANK_SRD);
> +
> + /* WaPsrDPRSUnmaskVBlankInSRD */
> + for_each_pipe(i) {
> + I915_WRITE(CHICKEN_PIPESL_1(i),
> + I915_READ(CHICKEN_PIPESL_1(i) |
> + DPRS_MASK_VBLANK_SRD));
> + }
> + }
> +
> +
> }
>
> static void haswell_init_clock_gating(struct drm_device *dev)

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>

--
Jesse Barnes, Intel Open Source Technology Center