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From: Jesse Barnes <jbarnes@virtuousgeek.org>
To: ville.syrjala@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/4] drm/i915: Improve vlv_gpu_freq() and vlv_freq_opcode()
Date: Wed, 6 Nov 2013 08:56:13 -0800	[thread overview]
Message-ID: <20131106085613.746dbfbf@jbarnes-desktop> (raw)
In-Reply-To: <1383684151-595-2-git-send-email-ville.syrjala@linux.intel.com>

On Tue,  5 Nov 2013 22:42:28 +0200
ville.syrjala@linux.intel.com wrote:

> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> We're currently miscalculating the VLV graphics clock a little bit.
> This is caused by rounding the step to integer MHz, which does not
> match reality. Change the formula to match the GUnit HAS to give
> more accurate answers.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 35 ++++++++++++-----------------------
>  1 file changed, 12 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index a5778e5..865035b 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5947,57 +5947,46 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv, u8 mbox, u32 val)
>  
>  int vlv_gpu_freq(int ddr_freq, int val)
>  {
> -	int mult, base;
> +	int div;
>  
> +	/* 4 x czclk */
>  	switch (ddr_freq) {
>  	case 800:
> -		mult = 20;
> -		base = 120;
> +		div = 10;
>  		break;
>  	case 1066:
> -		mult = 22;
> -		base = 133;
> +		div = 12;
>  		break;
>  	case 1333:
> -		mult = 21;
> -		base = 125;
> +		div = 16;
>  		break;
>  	default:
>  		return -1;
>  	}
>  
> -	return ((val - 0xbd) * mult) + base;
> +	return DIV_ROUND_CLOSEST(ddr_freq * (val + 6 - 0xbd), 4 * div);
>  }
>  
>  int vlv_freq_opcode(int ddr_freq, int val)
>  {
> -	int mult, base;
> +	int mul;
>  
> +	/* 4 x czclk */
>  	switch (ddr_freq) {
>  	case 800:
> -		mult = 20;
> -		base = 120;
> +		mul = 10;
>  		break;
>  	case 1066:
> -		mult = 22;
> -		base = 133;
> +		mul = 12;
>  		break;
>  	case 1333:
> -		mult = 21;
> -		base = 125;
> +		mul = 16;
>  		break;
>  	default:
>  		return -1;
>  	}
>  
> -	val /= mult;
> -	val -= base / mult;
> -	val += 0xbd;
> -
> -	if (val > 0xea)
> -		val = 0xea;
> -
> -	return val;
> +	return DIV_ROUND_CLOSEST(4 * mul * val, ddr_freq) + 0xbd - 6;
>  }
>  
>  void intel_pm_init(struct drm_device *dev)

Yeah these values look better at 1066 and 1333.  No differences at 800
though.

Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>

-- 
Jesse Barnes, Intel Open Source Technology Center
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  reply	other threads:[~2013-11-06 16:55 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-11-05 20:42 [PATCH 0/4] drm/i915: VLV graphics clock improvements ville.syrjala
2013-11-05 20:42 ` [PATCH 1/4] drm/i915: Improve vlv_gpu_freq() and vlv_freq_opcode() ville.syrjala
2013-11-06 16:56   ` Jesse Barnes [this message]
2013-11-05 20:42 ` [PATCH 2/4] drm/i915: Pass dev_priv to " ville.syrjala
2013-11-05 21:01   ` Jesse Barnes
2013-11-06 17:06     ` Daniel Vetter
2013-11-05 20:42 ` [PATCH 3/4] drm/i915: Store HPLL frequency in dev_priv on VLV ville.syrjala
2013-11-05 21:02   ` Jesse Barnes
2013-11-06  8:41     ` Ville Syrjälä
2013-11-06 10:02       ` Daniel Vetter
2013-11-05 20:42 ` [PATCH 4/4] drm/i915: Add support for VLV GPLL bypass ville.syrjala
2013-11-05 21:03   ` Jesse Barnes
2013-11-06 17:07     ` Daniel Vetter

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