From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 1/2] drm/i915: Fix gen2 scanout position readout Date: Wed, 6 Nov 2013 15:05:49 +0200 Message-ID: <20131106130549.GF5986@intel.com> References: <1381517564-6378-1-git-send-email-ville.syrjala@linux.intel.com> <1381517564-6378-2-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id B65A73806B for ; Wed, 6 Nov 2013 05:05:52 -0800 (PST) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Rodrigo Vivi Cc: intel-gfx List-Id: intel-gfx@lists.freedesktop.org On Wed, Nov 06, 2013 at 10:38:42AM -0200, Rodrigo Vivi wrote: > I was going to get this for -collector but got a big conflict. It should be already in. Although as it turns out it's partially crap. Apparently I hadn't tested the ISR vblank bit behaviour properly on non-PCH platforms. It doesn't actually work the way we want, so there are patches in my latest vblank timestamp series that kill the ISR parts and add a kludge to work around the scanline counter's silly behaviour. > = > = > On Fri, Oct 11, 2013 at 3:52 PM, wrote: > > From: Ville Syrj=E4l=E4 > > > > Gen2 doesn't have the pixelcount register that gen3 and gen4 have. > > Instead we must use the scanline counter like we do for ctg+. > > > > Signed-off-by: Ville Syrj=E4l=E4 > > --- > > drivers/gpu/drm/i915/i915_irq.c | 21 +++++++++++++++------ > > 1 file changed, 15 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i91= 5_irq.c > > index 63a9642..3c31a2f 100644 > > --- a/drivers/gpu/drm/i915/i915_irq.c > > +++ b/drivers/gpu/drm/i915/i915_irq.c > > @@ -592,7 +592,7 @@ static u32 gm45_get_vblank_counter(struct drm_devic= e *dev, int pipe) > > return I915_READ(reg); > > } > > > > -static bool g4x_pipe_in_vblank(struct drm_device *dev, enum pipe pipe) > > +static bool intel_pipe_in_vblank(struct drm_device *dev, enum pipe pip= e) > > { > > struct drm_i915_private *dev_priv =3D dev->dev_private; > > uint32_t status; > > @@ -603,7 +603,13 @@ static bool g4x_pipe_in_vblank(struct drm_device *= dev, enum pipe pipe) > > I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT; > > > > return I915_READ(VLV_ISR) & status; > > - } else if (IS_G4X(dev)) { > > + } else if (IS_GEN2(dev)) { > > + status =3D pipe =3D=3D PIPE_A ? > > + I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT : > > + I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT; > > + > > + return I915_READ16(ISR) & status; > > + } else if (INTEL_INFO(dev)->gen < 5) { > > status =3D pipe =3D=3D PIPE_A ? > > I915_DISPLAY_PIPE_A_VBLANK_INTERRUPT : > > I915_DISPLAY_PIPE_B_VBLANK_INTERRUPT; > > @@ -658,11 +664,14 @@ static int i915_get_crtc_scanoutpos(struct drm_de= vice *dev, int pipe, > > > > ret |=3D DRM_SCANOUTPOS_VALID | DRM_SCANOUTPOS_ACCURATE; > > > > - if (IS_G4X(dev) || INTEL_INFO(dev)->gen >=3D 5) { > > + if (IS_GEN2(dev) || IS_G4X(dev) || INTEL_INFO(dev)->gen >=3D 5)= { > > /* No obvious pixelcount register. Only query vertical > > * scanout position from Display scan line register. > > */ > > - position =3D I915_READ(PIPEDSL(pipe)) & 0x1fff; > > + if (IS_GEN2(dev)) > > + position =3D I915_READ(PIPEDSL(pipe)) & DSL_LIN= EMASK_GEN2; > > + else > > + position =3D I915_READ(PIPEDSL(pipe)) & DSL_LIN= EMASK_GEN3; > > > > /* > > * The scanline counter increments at the leading edge > > @@ -671,7 +680,7 @@ static int i915_get_crtc_scanoutpos(struct drm_devi= ce *dev, int pipe, > > * to get a more accurate picture whether we're in vbla= nk > > * or not. > > */ > > - in_vbl =3D g4x_pipe_in_vblank(dev, pipe); > > + in_vbl =3D intel_pipe_in_vblank(dev, pipe); > > if ((in_vbl && position =3D=3D vbl_start - 1) || > > (!in_vbl && position =3D=3D vbl_end - 1)) > > position =3D (position + 1) % vtotal; > > @@ -701,7 +710,7 @@ static int i915_get_crtc_scanoutpos(struct drm_devi= ce *dev, int pipe, > > else > > position +=3D vtotal - vbl_end; > > > > - if (IS_G4X(dev) || INTEL_INFO(dev)->gen >=3D 5) { > > + if (IS_GEN2(dev) || IS_G4X(dev) || INTEL_INFO(dev)->gen >=3D 5)= { > > *vpos =3D position; > > *hpos =3D 0; > > } else { > > -- > > 1.8.1.5 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > = > = > = > -- = > Rodrigo Vivi > Blog: http://blog.vivi.eng.br -- = Ville Syrj=E4l=E4 Intel OTC