From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Subject: Re: [Intel-gfx] [PATCH v2 0/7] drm/i915: Baytrail MIPI DSI support Updated Date: Mon, 11 Nov 2013 09:50:58 +0100 Message-ID: <20131111085057.GB3884@ulmo.nvidia.com> References: <1383990548-30737-1-git-send-email-shobhit.kumar@intel.com> <20131109102816.GJ14082@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0883854918==" Return-path: In-Reply-To: <20131109102816.GJ14082@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: dri-devel-bounces@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org To: Daniel Vetter Cc: jani.nikula@intel.com, Shobhit Kumar , intel-gfx , DRI Development , vijayakumar.balakrishnan@intel.com, yogesh.mohan.marimuthu@intel.com, Thierry Reding List-Id: intel-gfx@lists.freedesktop.org --===============0883854918== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="cmJC7u66zC7hs+87" Content-Disposition: inline --cmJC7u66zC7hs+87 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sat, Nov 09, 2013 at 11:28:16AM +0100, Daniel Vetter wrote: > On Sat, Nov 09, 2013 at 03:19:01PM +0530, Shobhit Kumar wrote: > > Hi All -=20 > > These patches enhance the current support for MIPI DSI for Baytrail. Th= ey > > continue on the sub-encoder design and adds few more dev_ops to handle > > sequence correctly. Major changes are - > >=20 > > 1. DSI Clock calculation based on pixel clock > > 2. Add new dev_ops for better sequencing the enable/disable path > > 3. Parameterized the hardcoded DSI parameters. These also forms building > > block for the generic MIPI driver to come in future based on enhance= ments > > in VBT. All these parameters are initialized or computed in the sub-= encoder > > driver. Some of them might look unneccesary for now. > >=20 > > I am also aware of the drm_bridge support now comming in and will in f= uture > > migrate from sub-encoder design to drm_bridge. >=20 > Just a quick aside: Thierry Reding from nvidia is also working on a DSI > design for the tegra driver. Atm he seems to aim for a full-blown DSI bus > based on his drm_panel patches for getting the panel metadata out of an > ARM DT (we'd use VBT instead). Iirc there's no patches anywhere yet, but > maybe Thierry could share a git branch somewhere with the wip stuff? >=20 > Cc'ing Thierry and dri-devel in case a bigger discussion develops. I've been cleaning up the patches and was going to post them today. The implementation really isn't as "full-blown" as you make it sound =3D), primarily because the DSI panel that I have doesn't support things such as reading out the DDB, so I cannot test most of the functionality that I planned to. However I think introducing a DSI bus type is the right thing and it's been suggested recently that we have too few bus types. Furthermore it seems to be playing out rather nicely with the DRM panel work, so it would be really nice if Intel could test-drive this within their driver to see if it's good enough for their purposes as well. Is everyone working on that subscribed to dri-devel or should I Cc the intel-gfx mailing list (or someone in particular) when posting the patches? Thierry --cmJC7u66zC7hs+87 Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAEBAgAGBQJSgJpxAAoJEN0jrNd/PrOh/EQQAK93mMaAwBpO+Nt/S+YbZX9P UXtQ0cXDbfgOJ0it8fTBZ7keAgvFrZLhRAa2H3CcTaWrPOQooUnHlfZXt2qczgfb MTPkW+w60mOh3XVFSrzHH1w+xwFE2eGau2UgtSw2nLG3lPyQdVOmBAweMClEdGUq ilm0DfEPUeX48y4vTLgHgJfbmm7hDFvsMDwmEa2ddaEO2RaTId+qs9dSZB5Ihdju t/4JDRGnNkS19FTtczcbzdi6egXfBgQQixwtoOc/9WJ3Hf2nGOOUt0MLWaAuIo3f 85Er21kmT0qXG8hOiHxsAJfwtCI7t8gDamteoI8XN+FuXF9PAIOCEn7en9cnLHR/ 13O7bUA8sLHmCQogM2eilglSua8Zu64BvdcJWwqAUYSeMHmNX0bbMa/MHL7PrSFV L+MxZhqM6dFQoV5OmMriKK10vFwX6eRferMa3dv87bbZOlpXkmmgcDnsTN82CZk7 xZukPPDG2iuPx4B8VssTbcSc9v9YqTZ+LH9OzneKRN/MP9IWqjrgdBM177xX0hw5 c5MiH0Gww3aELRhYD1l318UXwEYvHKxHnBzIqOK4JCHw+orgHLW1hYO+/ZhsxQp0 MemZLQvtTbR5O9yt2YLs4aigevWfTTEH991G2lD2tvQ6cJgYzCJJ9UO2W8pBmZ0t XasT3w33HXfkn7nOjwDM =w9DV -----END PGP SIGNATURE----- --cmJC7u66zC7hs+87-- --===============0883854918== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/dri-devel --===============0883854918==--