From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: Workaround for flicker with panning on the i830 - found a way for tiled displays Date: Fri, 15 Nov 2013 16:41:59 +0100 Message-ID: <20131115154159.GU22741@phenom.ffwll.local> References: <1565_1384184620_5280FB2C_1565_9181_1_CAKMK7uF2UmKJHvVPrzE7-7A9DQ5JrLHAFnDiuVUDHFU+DoOXww@mail.gmail.com> <52825A28.3040500@math.tu-berlin.de> <1565_1384276909_528263AC_1565_19510_1_20131112172217.GB3741@phenom.ffwll.local> <5283D81A.1080105@math.tu-berlin.de> <26136_1384374018_5283DF02_26136_9623_1_20131113202049.GH7251@phenom.ffwll.local> <52847857.7070200@math.tu-berlin.de> <26136_1384417275_528487FB_26136_12808_1_CAKMK7uEfiAoFutfk=mtqteuV07t5SneGniyXnRet_T3Bs4spRw@mail.gmail.com> <52851358.6040801@math.tu-berlin.de> <26136_1384453961_52851749_26136_18549_1_20131114183308.GI22741@phenom.ffwll.local> <52861E9B.5080509@math.tu-berlin.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ee0-f49.google.com (mail-ee0-f49.google.com [74.125.83.49]) by gabe.freedesktop.org (Postfix) with ESMTP id 65603FB8C8 for ; Fri, 15 Nov 2013 07:41:25 -0800 (PST) Received: by mail-ee0-f49.google.com with SMTP id b15so1153884eek.36 for ; Fri, 15 Nov 2013 07:41:24 -0800 (PST) Content-Disposition: inline In-Reply-To: <52861E9B.5080509@math.tu-berlin.de> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Thomas Richter Cc: intel-gfx List-Id: intel-gfx@lists.freedesktop.org On Fri, Nov 15, 2013 at 02:16:11PM +0100, Thomas Richter wrote: > Hi Daniel, hi others, > > did even more experiments. I guess I understand now better. Indeed, > the trouble seems to be the watermark levels. I played more > with all that, and the real culprit seems to be the FW_BLC register > controlling the watermarks. > > On the i830 with the current settings, it is defined to be 0x1080304 > which sets the watermark a bit too low. If I set it to > 0x1080306 instead, I get a stable display in all panning positions > (hurray!). > > I would like to fix this, but I guess I would need to understand the > logic a little bit better. At the time being, you probably better > put the linear frame buffer workaround on hold, it looks I really > got something here. Gosh, should have read the code more closely. We have a totally botched wm setup on i830M - the watermark code for the 2nd pipe is just not there! I'll try to wip up a patch to fix this. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch