From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rodrigo Vivi Subject: Re: [PATCH 04/10] drm/i915: Limit FBC flush to post batch flush Date: Wed, 20 Nov 2013 14:48:02 -0800 Message-ID: <20131120224322.GB4234@bratislava.jf.intel.com> References: <1383771745-22463-1-git-send-email-ville.syrjala@linux.intel.com> <1383771745-22463-5-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-pa0-f42.google.com (mail-pa0-f42.google.com [209.85.220.42]) by gabe.freedesktop.org (Postfix) with ESMTP id 1D46CFBE0A for ; Wed, 20 Nov 2013 14:48:14 -0800 (PST) Received: by mail-pa0-f42.google.com with SMTP id lj1so4875208pab.1 for ; Wed, 20 Nov 2013 14:48:14 -0800 (PST) Content-Disposition: inline In-Reply-To: <1383771745-22463-5-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Nov 06, 2013 at 11:02:19PM +0200, ville.syrjala@linux.intel.com wro= te: > From: Ville Syrj=E4l=E4 > = > Don't issue the FBC nuke/cache clean command when invalidate_domains!=3D0. Double negative almost confused me, but all right here. Reviewed-by: Rodrigo Vivi > That would indicate that we're not being called for the post-batch > flush. > = > Signed-off-by: Ville Syrj=E4l=E4 > --- > drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i9= 15/intel_ringbuffer.c > index e32c08a..752f208 100644 > --- a/drivers/gpu/drm/i915/intel_ringbuffer.c > +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c > @@ -354,7 +354,7 @@ gen7_render_ring_flush(struct intel_ring_buffer *ring, > intel_ring_emit(ring, 0); > intel_ring_advance(ring); > = > - if (flush_domains) > + if (!invalidate_domains && flush_domains) > return gen7_ring_fbc_flush(ring, FBC_REND_NUKE); > = > return 0; > @@ -1837,7 +1837,7 @@ static int gen6_ring_flush(struct intel_ring_buffer= *ring, > } > intel_ring_advance(ring); > = > - if (IS_GEN7(dev) && flush) > + if (IS_GEN7(dev) && !invalidate && flush) > return gen7_ring_fbc_flush(ring, FBC_REND_CACHE_CLEAN); > = > return 0; > -- = > 1.8.1.5 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx