From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rodrigo Vivi Subject: Re: [PATCH v2 08/10] drm/i915: Don't write ILK/IVB_FBC_RT_BASE directly Date: Wed, 20 Nov 2013 14:57:30 -0800 Message-ID: <20131120225730.GF4234@bratislava.jf.intel.com> References: <1383771745-22463-1-git-send-email-ville.syrjala@linux.intel.com> <1383771745-22463-9-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mail-pb0-f43.google.com (mail-pb0-f43.google.com [209.85.160.43]) by gabe.freedesktop.org (Postfix) with ESMTP id 1B16AFA683 for ; Wed, 20 Nov 2013 14:57:30 -0800 (PST) Received: by mail-pb0-f43.google.com with SMTP id rq2so8529847pbb.16 for ; Wed, 20 Nov 2013 14:57:29 -0800 (PST) Content-Disposition: inline In-Reply-To: <1383771745-22463-9-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Nov 06, 2013 at 11:02:23PM +0200, ville.syrjala@linux.intel.com wro= te: > From: Ville Syrj=E4l=E4 > = > We use LRIs to enable/disable the render tracking as needed. So leave > ILK_FBC_RT_BASE alone when enabling FBC on SNB. Shouldn't this be part of patch 6 > = > While at it, kill the IVB_FBC_RT_BASE completely since we don't use > render tracking on IVB+. and this a new patch? > = > TODO: Make ILK use the LRI mechanism too? > = > v2: Drop the IVB_FBC_RT_BASE write too > = > Signed-off-by: Ville Syrj=E4l=E4 > --- > drivers/gpu/drm/i915/intel_pm.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel= _pm.c > index 3f600ba..4f5293e7 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -212,7 +212,8 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, > (stall_watermark << DPFC_RECOMP_STALL_WM_SHIFT) | > (interval << DPFC_RECOMP_TIMER_COUNT_SHIFT)); > I915_WRITE(ILK_DPFC_FENCE_YOFF, crtc->y); > - I915_WRITE(ILK_FBC_RT_BASE, i915_gem_obj_ggtt_offset(obj) | ILK_FBC_RT_= VALID); > + if (IS_GEN5(dev)) > + I915_WRITE(ILK_FBC_RT_BASE, i915_gem_obj_ggtt_offset(obj) | ILK_FBC_RT= _VALID); > /* enable it... */ > I915_WRITE(ILK_DPFC_CONTROL, dpfc_ctl | DPFC_CTL_EN); > = > @@ -257,8 +258,6 @@ static void gen7_enable_fbc(struct drm_crtc *crtc, > struct drm_i915_gem_object *obj =3D intel_fb->obj; > struct intel_crtc *intel_crtc =3D to_intel_crtc(crtc); > = > - I915_WRITE(IVB_FBC_RT_BASE, i915_gem_obj_ggtt_offset(obj)); > - > I915_WRITE(ILK_DPFC_CONTROL, DPFC_CTL_EN | DPFC_CTL_LIMIT_1X | > IVB_DPFC_CTL_FENCE_EN | > intel_crtc->plane << IVB_DPFC_CTL_PLANE_SHIFT); > -- = > 1.8.1.5 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx