Re: [PULL] drm-intel-next

Daniel Vetter
2014-12-19T15:21:12Z

On Fri, Dec 19, 2014 at 10:44:34AM +0100, Daniel Vetter wrote:
> Hi Dave,
>
> drm-intel-next-2014-12-05:
> - dual-dsi enabling from Gaurav with prep work from Jani
> - reshuffling the ring init code to move towards a clean sw/hw state setup split
> - ring free space refactoring from Dave Gordon
> - s/seqno/request/ rework from John Harrison
> - psr support for vlv/chv from Rodrigo
> - skl mmio flip support from Damien
> - and the usual bits&pieces all over
>
> Looking at merges in -nightly there's a few harmless conflicts with things
> having changed right next to each another. Nothing complicated at all, so
> figured I'll send you the pull without a merge.
>
> This is the last one of my pre-holidays early pull requests for 3.20.

Well I've missed an important bugfix which is only in dinq thus far. So
please ignore this one, I'll send you a new one with more next year for
drm-intel patches.
-Daniel

>
> Cheers, Daniel
>
>
> The following changes since commit 00f0b3781028605910cb4662a0f8a4849b445fc2:
>
> drm/i915: Reject modeset when the same digital port is used more than once (2014-12-03 09:31:53 +0100)
>
> are available in the git repository at:
>
> git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2014-12-05
>
> for you to fetch changes up to 93dc1b6529eb8acd98243caaf399daf3c2c665bd:
>
> drm/i915: Update DRIVER_DATE to 20141205 (2014-12-05 15:59:16 +0100)
>
> ----------------------------------------------------------------
> - dual-dsi enabling from Gaurav with prep work from Jani
> - reshuffling the ring init code to move towards a clean sw/hw state setup split
> - ring free space refactoring from Dave Gordon
> - s/seqno/request/ rework from John Harrison
> - psr support for vlv/chv from Rodrigo
> - skl mmio flip support from Damien
> - and the usual bits&pieces all over
>
> ----------------------------------------------------------------
> Ander Conselvan de Oliveira (1):
> drm/i915: Remove unnecessary goto in intel_primary_plane_disable()
>
> Chris Wilson (1):
> drm/i915: Assert that we successfully downclock the GPU before suspend
>
> Damien Lespiau (5):
> drm/i915/skl: Read out crtl1 for eDP/DPLL0
> drm/i915/skl: Implement the skl version of MMIO flips
> drm/i915: Fix short description of intel_display_power_is_enabled()
> drm/i915/skl: Update the DDI translation values for DP/eDP 1.3
> drm/i915: Don't display nonsensical values in i915_ddb_info on gen < 9
>
> Daniel Vetter (10):
> drm/i915: Remove user pinning code
> drm/i915: Convert i915_wait_seqno to i915_wait_request
> drm/i915: Check locking in i915_gem_request_unreference
> drm/i915: Remove redundant flip_work->flip_queued_ring
> drm/i915: s/init()/init_hw()/ in intel_engine_cs
> drm/i915: Move intel_init_pipe_control out of engine->init_hw
> drm/i915: Only init engines once
> drm/i915: Flatten engine init control flow
> drm/i915: Move init_unused_rings to gem_init_hw
> drm/i915: Update DRIVER_DATE to 20141205
>
> Dave Gordon (4):
> drm/i915: Check for matching ringbuffer in logical_ring_wait_request()
> drm/i915: Don't read 'HEAD' MMIO register in LRC mode
> drm/i915: Make ring freespace calculation more robust
> drm/i915: Consolidate ring freespace calculations
>
> Gaurav K Singh (10):
> drm/i915: New functions added for enabling & disabling MIPI Port Ctrl reg
> drm/i915: Added port as parameter to the functions which does read/write of DSI Controller
> drm/i915: Add support for port enable/disable for dual link configuration
> drm/i915: Pixel Clock changes for DSI dual link
> drm/i915: Dual link needs Shutdown and Turn on packet for both ports
> drm/i915: Enable DSI PLL for both DSI0 and DSI1 in case of dual link
> drm/i915: cck reg used for checking DSI Pll locked
> drm/i915: MIPI Timings related changes for dual link
> drm/i915: Update the DSI disable path to support dual link panel disabling
> drm/i915: Update the DSI enable path to support dual
>
> Jani Nikula (3):
> drm/i915/dsi: clean up MIPI DSI pipe vs. port usage
> drm/i915/dsi: add ports to intel_dsi to describe the ports being driven
> drm/i915: release struct_mutex on the i915_gem_init_hw fail path
>
> John Harrison (19):
> drm/i915: Ensure OLS & PLR are always in sync
> drm/i915: Add reference count to request structure
> drm/i915: Add helper functions to aid seqno -> request transition
> drm/i915: Replace last_[rwf]_seqno with last_[rwf]_req
> drm/i915: Convert i915_gem_ring_throttle to use requests
> drm/i915: Ensure requests stick around during waits
> drm/i915: Remove 'outstanding_lazy_seqno'
> drm/i915: Make 'i915_gem_check_olr' actually check by request not seqno
> drm/i915: Convert 'last_flip_req' to be a request not a seqno
> drm/i915: Convert mmio_flip::seqno to struct request
> drm/i915: Convert __wait_seqno() to __wait_request()
> drm/i915: Remove obsolete seqno parameter from 'i915_add_request'
> drm/i915: Convert 'flip_queued_seqno' into 'flip_queued_request'
> drm/i915: Convert trace functions from seqno to request
> drm/i915: Convert 'ring_idle()' to use requests not seqnos
> drm/i915: Connect requests to rings at creation not submission
> drm/i915: Convert 'i915_seqno_passed' calls into 'i915_gem_request_completed'
> drm/i915: Remove the now redundant 'obj->ring'
> drm/i915: Convert 'trace_irq' to use requests rather than seqnos
>
> Michel Thierry (1):
> drm/i915/bdw: Add WaHdcDisableFetchWhenMasked
>
> Mika Kuoppala (1):
> drm/i915: Convert pxvid to extvid lookup table to a function
>
> Rodrigo Vivi (10):
> drm/i915: Parse VBT PSR block.
> drm/i915: HSW/BDW PSR Set idle_frames = VBT + 1
> drm/i915: PSR get full link off x standby from VBT
> drm/i915: remove PSR BDW single frame update.
> drm/i915: Remove intel_psr_is_enabled function.
> drm/i915: Add PSR registers for PSR VLV/CHV.
> drm/i915: PSR VLV/CHV: Introduce setup, enable and disable functions
> drm/i915: VLV/CHV PSR Software timer mode
> drm/i915: VLV/CHV PSR debugfs.
> drm/i915: Enable PSR for Baytrail and Braswell.
>
> Thomas Daniel (1):
> drm/i915: Fix startup failure in LRC mode after recent init changes
>
> Tvrtko Ursulin (1):
> drm/i915: Stop putting GGTT VMA at the head of the list
>
> Ville Syrjälä (2):
> drm/i915: Deal with video overlay on GPU reset
> drm/i915: s/MI_STORE_DWORD_IMM_GEN8/MI_STORE_DWORD_IMM_GEN4/
>
> drivers/gpu/drm/i915/i915_cmd_parser.c | 14 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 70 ++--
> drivers/gpu/drm/i915/i915_dma.c | 11 +-
> drivers/gpu/drm/i915/i915_drv.c | 2 +
> drivers/gpu/drm/i915/i915_drv.h | 124 +++++--
> drivers/gpu/drm/i915/i915_gem.c | 412 ++++++++++--------------
> drivers/gpu/drm/i915/i915_gem_context.c | 28 +-
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 10 +-
> drivers/gpu/drm/i915/i915_gem_gtt.c | 8 +-
> drivers/gpu/drm/i915/i915_gem_gtt.h | 13 +-
> drivers/gpu/drm/i915/i915_gem_render_state.c | 2 +-
> drivers/gpu/drm/i915/i915_gem_tiling.c | 2 +-
> drivers/gpu/drm/i915/i915_gpu_error.c | 9 +-
> drivers/gpu/drm/i915/i915_irq.c | 12 +-
> drivers/gpu/drm/i915/i915_reg.h | 349 +++++++++++---------
> drivers/gpu/drm/i915/i915_trace.h | 47 +--
> drivers/gpu/drm/i915/intel_bios.c | 45 +++
> drivers/gpu/drm/i915/intel_bios.h | 25 +-
> drivers/gpu/drm/i915/intel_ddi.c | 12 +-
> drivers/gpu/drm/i915/intel_display.c | 135 +++++---
> drivers/gpu/drm/i915/intel_dp.c | 13 +-
> drivers/gpu/drm/i915/intel_drv.h | 8 +-
> drivers/gpu/drm/i915/intel_dsi.c | 464 ++++++++++++++++-----------
> drivers/gpu/drm/i915/intel_dsi.h | 26 ++
> drivers/gpu/drm/i915/intel_dsi_cmd.c | 141 ++++----
> drivers/gpu/drm/i915/intel_dsi_cmd.h | 46 +--
> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 50 ++-
> drivers/gpu/drm/i915/intel_dsi_pll.c | 9 +-
> drivers/gpu/drm/i915/intel_lrc.c | 167 +++++-----
> drivers/gpu/drm/i915/intel_overlay.c | 44 ++-
> drivers/gpu/drm/i915/intel_pm.c | 155 ++-------
> drivers/gpu/drm/i915/intel_psr.c | 246 +++++++++++---
> drivers/gpu/drm/i915/intel_ringbuffer.c | 203 ++++++------
> drivers/gpu/drm/i915/intel_ringbuffer.h | 23 +-
> drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +-
> 35 files changed, 1694 insertions(+), 1233 deletions(-)
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch

--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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