[PULL] drm-intel-next

Daniel Vetter
2016-04-01T13:42:18Z

Hi Dave,

drm-intel-next-2016-03-30:
- VBT code refactor for a clean split between parsing&using of firmware
information (Jani)
- untangle the pll computation code, and splitting up the monster
i9xx_crtc_compute_clocks (Ander)
- dsi support for bxt (Jani, Shashank Sharma and others)
- color manager (i.e. de-gamma, color conversion matrix & gamma support) from
Lionel Landwerlin
- Vulkan hsw support in the command parser (Jordan Justen)
- large-scale renaming of intel_engine_cs variables/parameters to avoid the epic
ring vs. engine confusion introduced in gen8 (Tvrtko Ursulin)
- few atomic patches from Maarten&Matt, big one is two-stage wm programming on ilk-bdw
- refactor driver load and add infrastructure to inject load failures for
testing, from Imre
- various small things all over
drm-intel-next-2016-03-14:
- two-stage wm updates for ilk-style platforms (Matt)
- more wm work and fixes from Maarten&Ville
- more work on rotated framebuffers to prep for rotated nv12 (Ville)
- more dc fixes (Imre)
- various execlist patches from Tvrtko
- various clock cleanups for gmch from Ville
- extract intel_dpll_mgr.c and refactor shared dpll code (Ander)

Note 2 cycle's worth of patches, so you can't just take the pull tag
notes.

Cheers, Daniel

The following changes since commit 86d65b7e7a0c927d07d18605c276d0f142438ead:

nouveau: fix nv40_perfctr_next() cleanup regression (2016-03-16 15:08:43 +1000)

are available in the git repository at:

git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2016-03-30

for you to fetch changes up to 68d4aee9d1f271fe06e904cb99a10cf8479d3d2e:

drm/i915: Update DRIVER_DATE to 20160330 (2016-03-30 09:33:11 +0200)

----------------------------------------------------------------
- VBT code refactor for a clean split between parsing&using of firmware
information (Jani)
- untangle the pll computation code, and splitting up the monster
i9xx_crtc_compute_clocks (Ander)
- dsi support for bxt (Jani, Shashank Sharma and others)
- color manager (i.e. de-gamma, color conversion matrix & gamma support) from
Lionel Landwerlin
- Vulkan hsw support in the command parser (Jordan Justen)
- large-scale renaming of intel_engine_cs variables/parameters to avoid the epic
ring vs. engine confusion introduced in gen8 (Tvrtko Ursulin)
- few atomic patches from Maarten&Matt, big one is two-stage wm programming on ilk-bdw
- refactor driver load and add infrastructure to inject load failures for
testing, from Imre
- various small things all over

----------------------------------------------------------------
Alex Dai (1):
drm/i915/guc: Support GuC SKL v6.1

Ander Conselvan de Oliveira (29):
drm/i915: Move shared dpll code to a new file
drm/i915: Move ddi shared dpll code to intel_dpll_mgr.c
drm/i915: Split intel_get_shared_dpll() into smaller functions
drm/i915: Store a direct pointer to shared dpll in intel_crtc_state
drm/i915: Move shared dpll struct definitions to separate header file
drm/i915: Move shared dpll function prototypes to intel_dpll_mgr.h
drm/i915: Use a table to initilize shared dplls
drm/i915: Refactor platform specifics out of intel_get_shared_dpll()
drm/i915: Move HSW/BDW pll selection logic to intel_dpll_mgr.c
drm/i915: Move SKL/KLB pll selection logic to intel_dpll_mgr.c
drm/i915: Move BXT pll configuration logic to intel_dpll_mgr.c
drm/i915: Manage HSW/BDW LCPLLs with the shared dpll interface
drm/i915: Make SKL/KBL DPLL0 managed by the shared dpll code
drm/i915: Wait for vblank in i9xx_disable_crtc() for gen 2 only
drm/i915: Remove checks for cloned config with LVDS in dpll code
drm/i915: Merge ironlake_get_refclk() into its only caller
drm/i915: Fold intel_ironlake_limit() into clock computation function
drm/i915: Call g4x_find_best_dpll() directly from ILK+ code
drm/i915: Simplify ironlake reduced clock logic a bit
drm/i915: Don't calculate a new clock in ILK+ code if it is already set
drm/i915: Remove PCH type checks from ironlake_crtc_compute_clock()
drm/i915: Simplify ironlake_crtc_compute_clock() CPU eDP case
drm/i915: Pass crtc_state->dpll directly to ->find_dpll()
drm/i915: Move fp divisor calculation into ironlake_compute_dpll()
drm/i915: Merge ironlake_compute_clocks() and ironlake_crtc_compute_clock()
drm/i915: Split CHV and VLV specific crtc_compute_clock() hooks
drm/i915: Split i8xx_crtc_compute_clock()
drm/i915: Split g4x_crtc_compute_clock()
drm/i915: Split PNV version of crtc_compute_clock()

Chris Wilson (3):
drm/i915/csr: Allow matching unknown HW steppings with generic firmware
drm/i915: Codify our assumption that the Global GTT is <= 4GiB
drm/i915: Tidy aliasing_gtt_bind_vma()

Daniel Vetter (3):
drm/i915: Update DRIVER_DATE to 20160314
Merge remote-tracking branch 'airlied/drm-next' into drm-intel-next-queued
drm/i915: Update DRIVER_DATE to 20160330

Dave Gordon (2):
drm/i915: introduce for_each_engine_id()
drm/i915: replace for_each_engine()

Deepak M (1):
drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards

Eric Engestrom (2):
drm/i915: remove left over dead code
drm/i915: remove dead code

Imre Deak (29):
drm/i915: Add missing NULL check before calling initial_watermarks
drm/i915/skl: Fix power domain suspend sequence
drm/i915/gen9: Sanitize handling of allowed DC states
drm/i915/gen9: Disable DC states if power well support is disabled
drm/i915/gen9: Remove state asserts when disabling DC states
drm/i915/gen9: Fix DMC firmware initialization
drm/i915/bxt: Fix off-by-one error in Broxton PLL IDs
Fix MCHBAR cleanup on the driver init error path
drm/i915: Move load time PCH detect, DPIO, power domain SW init earlier
drm/i915: Move load time IRQ SW init earlier
drm/i915: Move load time init of display/audio hooks earlier
drm/i915: Move load time init of clock gating hooks earlier
drm/i915: Move load time runtime device info init earlier
drm/i915: Move load time gem_load_init earlier
drm/i915: Move load time runtime PM get later
drm/i915: Move load time shrinker registration later
drm/i915: Move load time audio component registration earlier
drm/i915: Move unload time display power domain uninit later
drm/i915: Move unload time GTT, MSI IRQ cleanup later
drm/i915: Move unload time opregion unregistration earlier
drm/i915: Split out load time early initialization
drm/i915: Split out load time MMIO initialization
drm/i915: Split out load time HW initialization
drm/i915: Split out load time interface registration
drm/i915: Fix power domain HW state cleanup on error path
drm/i915: Add fault injection support
drm/i915: Tune down init error message due to failure injection
drm/i915: Make __i915_printk debug output behave the same as DRM_DEBUG_DRIVER
drm/i915/bxt: Fix DSI HW state readout

Jani Nikula (25):
drm/i915/bxt: add missing DSI power domain to power well 1
drm/i915/dsi: lose the loose 666 format name in favor of packed
drm/i915/dsi: start using enum mipi_dsi_pixel_format
drm/i915: add for_each_port_masked macro
drm/i915: make transcoder_name return a string
drm/i915/dsi: refactor dsi get hw state readout
drm/i915/bxt: fix dsi hw state pipe readout
drm/i915: move VBT based TV presence check to intel_bios.c
drm/i915: move VBT based LVDS presence check to intel_bios.c
drm/i915: move VBT based eDP port check to intel_bios.c
drm/i915: move VBT based DSI presence check to intel_bios.c
drm/i915/panel: setup pwm backlight based on connector type
drm/i915/bios: drop has_mipi in favor of intel_bios_is_dsi_present
drm/i915: fix sparse warning for using false as NULL
drm/i915: hide away VBT private data in a separate header
drm/i915: split get/set pipe timings to timings and src size
drm/i915: split set pipeconf to pipeconf, pipemisc, pipe_gamma
drm/i915: abstract get config for cpu transcoder
drm/i915/bxt: add dsi transcoders
drm/i915/dsi: use the BIT macro for clarity
drm/i915/bxt: allow dsi on any pipe
drm/i915: use a substruct in vbt data for edp
drm/i915: move edp low vswing config to vbt data
drm/i915: move sdvo mappings to vbt data
drm/i915: remove unused dev_priv->render_reclock_avail

Jesse Barnes (1):
drm/i915: add another virtual PCH bridge for passthrough support

Joonas Lahtinen (3):
drm/i915/gtt: Reference mappable_end variable from pointer
drm/i915: Rename dev_priv->gtt to dev_priv->ggtt
drm/i915/gtt: Clean up GGTT probing code

Jordan Justen (5):
drm/i915: Add TIMESTAMP to register whitelist
drm/i915: Use an array of register tables in command parser
drm/i915: Move Haswell registers to separate whitelist table
drm/i915: Add Haswell CS GPR registers to whitelist
drm/i915: Bump command parser version for new whitelisted registers

Lionel Landwerlin (4):
drm/i915: Extract out gamma table and CSC to their own file
drm/i915: Do not read GAMMA_MODE register
drm/i915: Implement color management on bdw/skl/bxt/kbl
drm/i915: Implement color management on chv

Lukas Wunner (1):
drm/i915: Fix races on fbdev

Lyude (2):
drm/i915: Fix race condition in intel_dp_destroy_mst_connector()
drm/i915: Call intel_dp_mst_resume() before resuming displays

Maarten Lankhorst (13):
drm/i915: Handle -EDEADLK in drm_atomic_commit from load-detect.
drm/i915: Do not return unknown status when load detection is tested.
drm/i915: Handle invalid ilk pipe watermarks correctly.
drm/i915: Allow preservation of watermarks, v2.
drm/i915: Only recalculate wm's for planes part of the state, v2.
drm/i915: Only use sanitized values for ILK watermarks
drm/i915: Update state before setting watermarks, v2.
drm/i915: Remove some post-commit members from intel_crtc->atomic, v3.
drm/i915: Nuke fbc members from intel_crtc->atomic, v4.
drm/i915: Use a crtc mask instead of a refcount for dpll functions, v2.
drm/i915: Perform dpll commit first, v2.
drm/i915: Move pll power state to crtc power domains.
drm/i915: Remove vblank wait from hsw_enable_ips, v2.

Matt Roper (2):
drm/i915: Add two-stage ILK-style watermark programming (v11)
drm/i915: Wait until after wm optimization to drop runtime PM reference

Mika Kuoppala (3):
drm/i915/hangcheck: Prevent long walks across full-ppgtt
drm/i915: Modify reset func to handle per engine resets
drm/i915: Fix use after free when printing load failure

Nathan Schulte (1):
drm/i915: add module param "enable_dp_mst"

Sagar Arun Kamble (1):
drm/i915: Hold RPM reference while setting freq limits through sysfs

Shashank Sharma (1):
drm/i915/bxt: Initialize MIPI DSI for BXT

Takashi Iwai (1):
drm/i915: Fix bogus dig_port_map[] assignment for pre-HSW

Tim Gore (1):
drm/i915/gen9: add WaClearFlowControlGpgpuContextSave

Tomas Elf (2):
drm/i915: Generalise common GPU engine reset request/unrequest code
drm/i915/tdr: Initialize hangcheck struct for each engine

Tvrtko Ursulin (15):
drm/i915: Execlists small cleanups and micro-optimisations
drm/i915: Avoid snooping with userptr where not supported
drm/i915: Add wait_for_us
drm/i915/lrc: Do not wait atomically when stopping engines
drm/i915: Kconfig for extra driver debugging
drm/i915: Do not lie about atomic timeout granularity
drm/i915: Do not wait atomically for display clocks
drm/i915: Rename local struct intel_engine_cs variables
drm/i915: Rename intel_engine_cs function parameters
drm/i915: Rename intel_engine_cs struct members
drm/i915: More intel_engine_cs renaming
drm/i915: More renaming of rings to engines
drm/i915: Remove unused variable in i915_gem_request_add_to_client
drm/i915: Use shorter route to dev_private where possible
drm/i915: Move CSB MMIO reads out of the execlists lock

Ville Syrjälä (27):
drm/i915: Account for the size of the chroma plane for the rotated gtt view
drm/i915: s/tile_width/tile_width_bytes/
drm/i915: Pass 90/270 vs. 0/180 rotation info for intel_gen4_compute_page_offset()
drm/i915: Support for extra alignment for tiled surfaces
drm/i915: Don't pass plane+plane_state to intel_pin_and_fence_fb_obj()
drm/i915: Pass drm_frambuffer to intel_compute_page_offset()
drm/i915: Reorganize intel_rotation_info
drm/i915: Move the NULL sg handling out from rotate_pages()
drm/i915: Embed rotation_info under intel_framebuffer
drm/i915: Dump ddi_pll_sel in hex instead of decimal on HSW/BDW
drm/i915: Move the encoder vs. FDI dotclock check out from encoder .get_config()
drm/i915: Remove the SPLL==270Mhz assumption from intel_fdi_link_freq()
drm/i915: Make the LPT iclkip 20MHz case more generic
drm/i915: Read out VGA dotclock properly on LPT
drm/i915: Try to fix CRT port clock limits
drm/i915: Store rawclk_freq in dev_priv
drm/i915: Rename s/i9xx/g4x/ in DP code
drm/i915: Use g4x_get_aux_clock_divider() for VLV/CHV
drm/i915: Read out hrawclk from CCK on vlv/chv
drm/i915: Clean up .get_aux_clock_divider() functions
drm/i915: Use DIV_ROUND_CLOSEST for PWM calculations
drm/i915: Actually retry with bit-banging after GMBUS timeout
Revert "drm/i915: Enable PSR by default on Valleyview and Cherryview."
drm/i915: Pass the correct crtc state to .update_plane()
drm/i915: Fix watermarks for VLV/CHV
drm/i915: Wait for vblank after cxsr disable in pre_plane_update
drm/i915: s/crtc_state/old_crtc_state/ in intel_atomic_commit()

arun.siluvery@linux.intel.com (2):
drm/i915/error: Capture WA ctx batch in error state
drm/i915/tdr: Prepare error handler to accept mask of hung engines

Documentation/DocBook/gpu.tmpl | 8 +-
drivers/gpu/drm/i915/Kconfig | 6 +
drivers/gpu/drm/i915/Kconfig.debug | 12 +
drivers/gpu/drm/i915/Makefile | 2 +
drivers/gpu/drm/i915/i915_cmd_parser.c | 211 ++-
drivers/gpu/drm/i915/i915_debugfs.c | 287 +--
drivers/gpu/drm/i915/i915_dma.c | 480 +++--
drivers/gpu/drm/i915/i915_drv.c | 34 +-
drivers/gpu/drm/i915/i915_drv.h | 311 ++-
drivers/gpu/drm/i915/i915_gem.c | 410 ++--
drivers/gpu/drm/i915/i915_gem_context.c | 174 +-
drivers/gpu/drm/i915/i915_gem_debug.c | 16 +-
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 130 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 383 ++--
drivers/gpu/drm/i915/i915_gem_gtt.h | 19 +-
drivers/gpu/drm/i915/i915_gem_render_state.c | 12 +-
drivers/gpu/drm/i915/i915_gem_render_state.h | 2 +-
drivers/gpu/drm/i915/i915_gem_stolen.c | 50 +-
drivers/gpu/drm/i915/i915_gem_userptr.c | 7 +
drivers/gpu/drm/i915/i915_gpu_error.c | 197 +-
drivers/gpu/drm/i915/i915_guc_submission.c | 45 +-
drivers/gpu/drm/i915/i915_irq.c | 280 ++-
drivers/gpu/drm/i915/i915_params.c | 9 +
drivers/gpu/drm/i915/i915_params.h | 2 +
drivers/gpu/drm/i915/i915_reg.h | 173 +-
drivers/gpu/drm/i915/i915_sysfs.c | 10 +
drivers/gpu/drm/i915/i915_trace.h | 52 +-
drivers/gpu/drm/i915/i915_vgpu.c | 14 +-
drivers/gpu/drm/i915/intel_atomic.c | 5 +-
drivers/gpu/drm/i915/intel_atomic_plane.c | 4 +-
drivers/gpu/drm/i915/intel_audio.c | 16 +-
drivers/gpu/drm/i915/intel_bios.c | 224 ++-
drivers/gpu/drm/i915/intel_bios.h | 861 +--------
drivers/gpu/drm/i915/intel_color.c | 556 ++++++
drivers/gpu/drm/i915/intel_crt.c | 40 +-
drivers/gpu/drm/i915/intel_csr.c | 86 +-
drivers/gpu/drm/i915/intel_ddi.c | 1218 +-----------
drivers/gpu/drm/i915/intel_display.c | 2616 +++++++++++++-------------
drivers/gpu/drm/i915/intel_dp.c | 189 +-
drivers/gpu/drm/i915/intel_dp_mst.c | 10 +-
drivers/gpu/drm/i915/intel_dpll_mgr.c | 1773 +++++++++++++++++
drivers/gpu/drm/i915/intel_dpll_mgr.h | 164 ++
drivers/gpu/drm/i915/intel_drv.h | 171 +-
drivers/gpu/drm/i915/intel_dsi.c | 116 +-
drivers/gpu/drm/i915/intel_dsi.h | 15 +-
drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 33 +-
drivers/gpu/drm/i915/intel_dsi_pll.c | 126 +-
drivers/gpu/drm/i915/intel_fbc.c | 4 +-
drivers/gpu/drm/i915/intel_fbdev.c | 19 +-
drivers/gpu/drm/i915/intel_fifo_underrun.c | 6 +-
drivers/gpu/drm/i915/intel_guc_loader.c | 22 +-
drivers/gpu/drm/i915/intel_hdmi.c | 3 -
drivers/gpu/drm/i915/intel_lrc.c | 998 +++++-----
drivers/gpu/drm/i915/intel_lrc.h | 16 +-
drivers/gpu/drm/i915/intel_lvds.c | 65 +-
drivers/gpu/drm/i915/intel_mocs.c | 14 +-
drivers/gpu/drm/i915/intel_overlay.c | 64 +-
drivers/gpu/drm/i915/intel_panel.c | 52 +-
drivers/gpu/drm/i915/intel_pm.c | 398 ++--
drivers/gpu/drm/i915/intel_psr.c | 6 +-
drivers/gpu/drm/i915/intel_ringbuffer.c | 1449 +++++++-------
drivers/gpu/drm/i915/intel_ringbuffer.h | 106 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 149 +-
drivers/gpu/drm/i915/intel_sdvo.c | 20 +-
drivers/gpu/drm/i915/intel_sprite.c | 27 +-
drivers/gpu/drm/i915/intel_tv.c | 58 +-
drivers/gpu/drm/i915/intel_uncore.c | 141 +-
drivers/gpu/drm/i915/intel_vbt_defs.h | 826 ++++++++
68 files changed, 9000 insertions(+), 7002 deletions(-)
create mode 100644 drivers/gpu/drm/i915/Kconfig.debug
create mode 100644 drivers/gpu/drm/i915/intel_color.c
create mode 100644 drivers/gpu/drm/i915/intel_dpll_mgr.c
create mode 100644 drivers/gpu/drm/i915/intel_dpll_mgr.h
create mode 100644 drivers/gpu/drm/i915/intel_vbt_defs.h

--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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