From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 8/8] drm/i915: Enable FBC for all mobile gen2 and gen3 platforms Date: Thu, 12 Dec 2013 16:32:49 +0200 Message-ID: <20131212143249.GB10036@intel.com> References: <1385652602-8528-1-git-send-email-ville.syrjala@linux.intel.com> <1385652602-8528-9-git-send-email-ville.syrjala@linux.intel.com> <1386857974.6866.10.camel@intelbox> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga14.intel.com (mga14.intel.com [143.182.124.37]) by gabe.freedesktop.org (Postfix) with ESMTP id 3FC5BFB3AE for ; Thu, 12 Dec 2013 06:32:53 -0800 (PST) Content-Disposition: inline In-Reply-To: <1386857974.6866.10.camel@intelbox> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Imre Deak Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Dec 12, 2013 at 04:19:34PM +0200, Imre Deak wrote: > On Thu, 2013-11-28 at 17:30 +0200, ville.syrjala@linux.intel.com wrote: > > From: Ville Syrj=E4l=E4 > > = > > All mobile gen2 and gen3 chipsets should have FBC1, and the code > > should now handle them all. So just set has_fbc=3Dtrue for all such > > chipsets. > > = > > Signed-off-by: Ville Syrj=E4l=E4 > = > Based on the above we could also enable fbc for i830. In any case: > Reviewed-by: Imre Deak According to the spec there's no FBC on 830, so I guess my commit message was a tad incorrect. Some part of the spec hints that FBC might be avilable on 865 too, but in another part only 85x is mentioned. > = > > --- > > drivers/gpu/drm/i915/i915_drv.c | 3 +++ > > 1 file changed, 3 insertions(+) > > = > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i91= 5_drv.c > > index 0ec0fb3..923c8b6 100644 > > --- a/drivers/gpu/drm/i915/i915_drv.c > > +++ b/drivers/gpu/drm/i915/i915_drv.c > > @@ -172,6 +172,7 @@ static const struct intel_device_info intel_i85x_in= fo =3D { > > .gen =3D 2, .is_i85x =3D 1, .is_mobile =3D 1, .num_pipes =3D 2, > > .cursor_needs_physical =3D 1, > > .has_overlay =3D 1, .overlay_needs_physical =3D 1, > > + .has_fbc =3D 1, > > .ring_mask =3D RENDER_RING, > > }; > > = > > @@ -191,6 +192,7 @@ static const struct intel_device_info intel_i915gm_= info =3D { > > .cursor_needs_physical =3D 1, > > .has_overlay =3D 1, .overlay_needs_physical =3D 1, > > .supports_tv =3D 1, > > + .has_fbc =3D 1, > > .ring_mask =3D RENDER_RING, > > }; > > static const struct intel_device_info intel_i945g_info =3D { > > @@ -203,6 +205,7 @@ static const struct intel_device_info intel_i945gm_= info =3D { > > .has_hotplug =3D 1, .cursor_needs_physical =3D 1, > > .has_overlay =3D 1, .overlay_needs_physical =3D 1, > > .supports_tv =3D 1, > > + .has_fbc =3D 1, > > .ring_mask =3D RENDER_RING, > > }; > > = > = -- = Ville Syrj=E4l=E4 Intel OTC