From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jesse Barnes Subject: Re: [PATCH 1/2] drm/i915: make sure south port interrupts are enabled properly Date: Fri, 10 Jan 2014 13:05:21 -0800 Message-ID: <20140110130521.79c4b9c6@jbarnes-desktop> References: <1389387741-5384-1-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from oproxy19-pub.mail.unifiedlayer.com (oproxy19-pub.mail.unifiedlayer.com [70.40.200.33]) by gabe.freedesktop.org (Postfix) with SMTP id EACFD105785 for ; Fri, 10 Jan 2014 13:05:21 -0800 (PST) Received: from [67.161.37.189] (port=53173 helo=jbarnes-desktop) by box514.bluehost.com with esmtpsa (UNKNOWN:CAMELLIA128-SHA:128) (Exim 4.80) (envelope-from ) id 1W1jGb-0001jS-DE for intel-gfx@lists.freedesktop.org; Fri, 10 Jan 2014 14:05:21 -0700 In-Reply-To: <1389387741-5384-1-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, 10 Jan 2014 13:02:20 -0800 Jesse Barnes wrote: > We were apparently relying on the defaults on BDW, which resulted in no > hotplug or AUX interrupts. > > References: https://bugs.freedesktop.org/show_bug.cgi?id=72834 > References: https://bugs.freedesktop.org/show_bug.cgi?id=72833 > Signed-off-by: Jesse Barnes > --- > drivers/gpu/drm/i915/i915_irq.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 261254a..f88e265 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -2763,13 +2763,15 @@ static void ibx_irq_postinstall(struct drm_device *dev) > mask = SDE_GMBUS | SDE_AUX_MASK | SDE_TRANSB_FIFO_UNDER | > SDE_TRANSA_FIFO_UNDER | SDE_POISON; > } else { > - mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT | SDE_ERROR_CPT; > + mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT | SDE_ERROR_CPT | > + SDE_HOTPLUG_MASK_CPT; > > I915_WRITE(SERR_INT, I915_READ(SERR_INT)); > } > > I915_WRITE(SDEIIR, I915_READ(SDEIIR)); > I915_WRITE(SDEIMR, ~mask); > + I915_WRITE(SDEIER, mask); > } > > static void gen5_gt_irq_postinstall(struct drm_device *dev) Note we still don't handle port A interrupts. Not sure if that's important since we don't really use them yet, but if we want to add that we'd probably need to add some new code to the hpd functions to deal with walking both CPU and PCH masks. -- Jesse Barnes, Intel Open Source Technology Center