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From: Daniel Vetter <daniel@ffwll.ch>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>,
	Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 3/6] drm/i915: reset eDP timestamps on resume
Date: Mon, 20 Jan 2014 17:10:43 +0100	[thread overview]
Message-ID: <20140120161043.GE15089@phenom.ffwll.local> (raw)
In-Reply-To: <CA+gsUGQZsOptGtv7KaJ1o9gAfw_=K_TZwtcPDueb7NYVbq2JSA@mail.gmail.com>

On Mon, Jan 20, 2014 at 01:47:51PM -0200, Paulo Zanoni wrote:
> 2014/1/17 Daniel Vetter <daniel@ffwll.ch>:
> > On Fri, Jan 17, 2014 at 10:21 PM, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> >> On Fri, Jan 17, 2014 at 07:11:14PM -0200, Paulo Zanoni wrote:
> >>> 2014/1/17 Chris Wilson <chris@chris-wilson.co.uk>:
> >>> > On Fri, Jan 17, 2014 at 06:17:42PM -0200, Paulo Zanoni wrote:
> >>> >> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
> >>> >>
> >>> >> The eDP code records a few timestamps containing the last time we took
> >>> >> some actions, because we need to wait before doing some other actions.
> >>> >> The problem is that if we store a timestamp when suspending and then
> >>> >> look at it when resuming, we'll ignore the unknown amount of time we
> >>> >> actually were suspended.
> >>> >>
> >>> >> This happens with the panel power cycle delay: it's 500ms on my
> >>> >> machine, and it's delaying the resume sequence by 200ms due to a
> >>> >> timestamp we recorded before suspending. This patch should solve this
> >>> >> problem by resetting the timestamps.
> >>> >
> >>> > But you don't explain why this is safe. The code nerfs the timeouts so
> >>> > that they are ignored, yet the delays are independent. Should this be
> >>> > based on realtime rather than jiffies?
> >>>
> >>> I'm not sure I understand your question. What's the problem you see exactly?
> >>
> >> Given the fast suspend & resume, we will not have waited the required
> >> panel off time before poking it again etc. What makes that safe?
> >
> > Even worse the kernel might abort the suspend due to some issue and
> > we'll immediately resume. Also, and immediate thaw operation after
> > freezing is how hibernate works. Iirc the hw always enforces the full
> > power off delay after a power reset for exactly this reason (at least
> > on current platforms afaik).
> 
> Oh, now I get it. My bad. A brief experiment here shows that
> do_gettimeofday or current_kernel_time can probably be used to fix the
> problem. But since that requires properly getting all the timestamps
> in the correct units, maybe rewriting some functions, I'll wait a few
> days before I come back to this problem.

A simpler solution might be to grab timestamps in our resume code both
right at the end of our freeze function and at the beginning of thaw. Then
the driver code could convert this once into
dev->jiffies_elapsed_in_suspend or something and the dp->reset function
could simply use that to adjust the timeout values a bit (instead of
completely resetting everything).

The tricky bit should only be how to get the off-by-one stuff right: For
timeouts/waits we need to round up (+1), for this elapsed time we need to
round down one jiffy i.e. -1, but not less than 0 ofc ;-)

So I think you should be able to fix up your patch with very little work
(and no changes to the logic you've already created&tested).

> > But with the minimal delays in patch 6
> > that won't help any more, either.
> 
> Patch 6 should be independent of this. This patch is just to save us
> some time in the resume cases, but patch 6 is to correct the amount of
> time we wait while we disable the panel. I don't see a reason to block
> patch 6 on this one.

Hm yeah, with the new logic (but without the reset on resume) we should
still be save. I'll merge it, together with my prep patch to move the
reset callbacks around a bit.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2014-01-20 16:10 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-19 16:29 [PATCH 0/6] eDP panel power sequencing optimizations Paulo Zanoni
2013-12-19 16:29 ` [PATCH 1/6] drm/i915: init the DP panel power seq variables earlier Paulo Zanoni
2013-12-19 17:24   ` Jesse Barnes
2013-12-19 16:29 ` [PATCH 2/6] drm/i915: save some time when waiting the eDP timings Paulo Zanoni
2013-12-19 17:32   ` Jesse Barnes
2013-12-20  9:30   ` Jani Nikula
2013-12-20 14:24     ` Daniel Vetter
2014-01-03 18:27     ` Paulo Zanoni
2014-01-03 19:45       ` Paulo Zanoni
2014-01-17 13:09   ` Jani Nikula
2014-01-17 13:29     ` Daniel Vetter
2014-01-17 13:53       ` Daniel Vetter
2013-12-19 16:29 ` [PATCH 3/6] drm/i915: reset eDP timestamps on resume Paulo Zanoni
2013-12-19 17:35   ` Jesse Barnes
2014-01-03 19:46     ` Paulo Zanoni
2014-01-15 18:21       ` Jesse Barnes
2014-01-15 23:36         ` Daniel Vetter
2014-01-16 14:26           ` Paulo Zanoni
2014-01-17 20:17             ` Paulo Zanoni
2014-01-17 20:22               ` Chris Wilson
2014-01-17 21:11                 ` Paulo Zanoni
2014-01-17 21:21                   ` Chris Wilson
2014-01-17 21:34                     ` Daniel Vetter
2014-01-20 15:47                       ` Paulo Zanoni
2014-01-20 16:10                         ` Daniel Vetter [this message]
2013-12-19 16:29 ` [PATCH 4/6] drm/i915: remove a column of zeros from the eDP wait definitions Paulo Zanoni
2013-12-19 17:36   ` Jesse Barnes
2013-12-19 16:29 ` [PATCH 5/6] drm/i915: don't wait for power cycle when waiting for power off Paulo Zanoni
2013-12-19 17:38   ` Jesse Barnes
2013-12-19 18:34     ` Jesse Barnes
2013-12-19 16:29 ` [PATCH 6/6] drm/i915: set the backlight panel delays registers to 1 Paulo Zanoni
2013-12-19 17:39   ` Jesse Barnes
2014-01-17 13:57     ` Daniel Vetter
2014-01-20 16:12       ` Daniel Vetter
2014-01-28  7:57   ` Jani Nikula
2014-01-28  8:02     ` Daniel Vetter
2014-01-28  8:23       ` Jani Nikula

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