From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH v2 3/5] drm/i915: Make sprite updates atomic
Date: Mon, 20 Jan 2014 20:38:13 +0200 [thread overview]
Message-ID: <20140120183813.GY9454@intel.com> (raw)
In-Reply-To: <CAKMK7uGAQbxhC49UXqei-Mr9A+Wr281PALr_EbFQ7RumFzT41Q@mail.gmail.com>
On Mon, Jan 20, 2014 at 06:43:42PM +0100, Daniel Vetter wrote:
> On Mon, Jan 20, 2014 at 5:56 PM, Ville Syrjälä
> <ville.syrjala@linux.intel.com> wrote:
> >> > +{
> >> > + struct drm_device *dev = crtc->dev;
> >> > + struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> >> > + const struct drm_display_mode *mode = &intel_crtc->config.adjusted_mode;
> >> > + enum pipe pipe = intel_crtc->pipe;
> >> > + /* FIXME needs to be calibrated sensibly */
> >> > + unsigned int min = mode->crtc_vblank_start - usecs_to_scanlines(mode, 100);
> >> > + unsigned int max = mode->crtc_vblank_start - 1;
> >> > + long timeout = msecs_to_jiffies_timeout(1);
> >> > + unsigned int scanline;
> >> > +
> >> > + if (WARN_ON(drm_vblank_get(dev, pipe)))
> >> > + return;
> >> > +
> >> > + local_irq_disable();
> >> > +
> >> > + intel_crtc->vbl_received = false;
> >
> > Now that you got me thinking about barriers again, I wonder if I should
> > add an explicit compiler barrier here. The intel_get_crtc_scanline() call
> > should act as a compiler barrier though, so it shouldn't be needed. So
> > maybe I should add a comment here too?
>
> This piece of code here was the actual reason I've asked for barrier
> comments ;-) Ofc document the wake_up/wait_even barriers for the irq
> write -> read here is also good, but this write here is imo the
> crucial piece.
>
> Also I think we should have a check here that the caller is holding
> the crtc lock, to make sure that only one thread is using this
> facility. Oh, and one more while I ponder this: We enable interrupt
> processing before crtcs are fully set up, so chasing the pipe->crtc
> mapping from the irq handling either needs to be done carefully (i.e.
> a small analysis of why we won't ever get an vblank interrupt before
> the crtc is set up) or needs to use something statically allocated in
> dev_priv.
We have the same problem already w/ underrun interrupts at least, no?
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2014-01-20 18:38 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-17 18:09 [PATCH v2 0/5] drm/i915: Atomic sprites v2 ville.syrjala
2014-01-17 18:09 ` [PATCH v2 1/5] drm/i915: Add intel_get_crtc_scanline() ville.syrjala
2014-01-17 18:09 ` [PATCH 2/5] drm/i915: Shuffle sprite register writes into a tighter group ville.syrjala
2014-01-17 18:09 ` [PATCH v2 3/5] drm/i915: Make sprite updates atomic ville.syrjala
2014-01-20 16:23 ` Daniel Vetter
2014-01-20 16:56 ` Ville Syrjälä
2014-01-20 17:43 ` Daniel Vetter
2014-01-20 18:38 ` Ville Syrjälä [this message]
2014-01-20 19:16 ` Daniel Vetter
2014-01-21 14:12 ` [PATCH v3 " ville.syrjala
2014-01-26 17:29 ` Daniel Vetter
2014-01-27 11:06 ` Ville Syrjälä
2014-01-27 16:03 ` Daniel Vetter
2014-02-06 9:25 ` Ville Syrjälä
2014-02-06 9:42 ` Daniel Vetter
2014-01-17 18:09 ` [PATCH 4/5] drm/i915: Perform primary enable/disable atomically with sprite updates ville.syrjala
2014-01-21 14:13 ` [PATCH v2 " ville.syrjala
2014-01-17 18:09 ` [PATCH v2 5/5] drm/i915: Add pipe update trace points ville.syrjala
2014-01-21 14:13 ` [PATCH v3 " ville.syrjala
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