From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Subject: Re: [PATCH 04/28] drm/i915: We implement
 WaDisableL3CacheAging:vlv
Date: Thu, 23 Jan 2014 22:32:20 +0200
Message-ID: <20140123203220.GY9454@intel.com>
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To: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
List-Id: intel-gfx@lists.freedesktop.org

On Thu, Jan 23, 2014 at 06:25:26PM -0200, Rodrigo Vivi wrote:
> On Wed, Jan 22, 2014 at 5:32 PM,  <ville.syrjala@linux.intel.com> wrote:
> > From: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>
> >
> > Signed-off-by: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/int=
el_pm.c
> > index 6c0a10a..0e724c9 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4939,8 +4939,9 @@ static void valleyview_init_clock_gating(struct d=
rm_device *dev)
> >         I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
> >                    GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
> >
> > -       /* WaApplyL3ControlAndL3ChickenMode:vlv */
> > +       /* WaDisableL3CacheAging:vlv */
> =

> this is right.
> =

> >         I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L=
3AGDIS);
> > +       /* WaApplyL3ControlAndL3ChickenMode:vlv */
> =

> On wa_database I only see this name with ivb...  nothing from vlv with
> this wa name.

Let me refer you to patch 16 in the series...

> =

> >         I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MO=
DE);
> >
> >         /* WaForceL3Serialization:vlv */
> > --
> > 1.8.3.2
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> =

> =

> =

> -- =

> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br

-- =

Ville Syrj=E4l=E4
Intel OTC