From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Subject: Re: [PATCH] drm/i915: Add Baytrail PSR Support.
Date: Fri, 24 Jan 2014 16:53:16 +0200
Message-ID: <20140124145316.GH9454@intel.com>
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To: Rodrigo Vivi <rodrigo.vivi@gmail.com>
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On Thu, Jan 23, 2014 at 05:19:53PM -0200, Rodrigo Vivi wrote:
<snip>
> index 76126e0..f5501ab 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1969,6 +1969,40 @@
>  #define BCLRPAT(pipe) _PIPE(pipe, _BCLRPAT_A, _BCLRPAT_B)
>  #define VSYNCSHIFT(trans) _TRANSCODER(trans, _VSYNCSHIFT_A, _VSYNCSHIFT_=
B)
>  =

> +/* VLV eDP PSR registers */
> +#define VLV_EDP_PSR_CTL				(VLV_DISPLAY_BASE + 0x60090)

VLV has per-pipe PSR registers. The ones you have here are just for
pipe A. Seems like some rework is needed to make it work on either
pipe.


-- =

Ville Syrj=E4l=E4
Intel OTC