From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 1/7] [v2] drm/i915: Create a USES_PPGTT macro Date: Tue, 28 Jan 2014 09:14:12 +0100 Message-ID: <20140128081412.GN9772@phenom.ffwll.local> References: <1390892826-26973-1-git-send-email-benjamin.widawsky@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ee0-f45.google.com (mail-ee0-f45.google.com [74.125.83.45]) by gabe.freedesktop.org (Postfix) with ESMTP id C05841057BA for ; Tue, 28 Jan 2014 00:14:16 -0800 (PST) Received: by mail-ee0-f45.google.com with SMTP id b15so33847eek.32 for ; Tue, 28 Jan 2014 00:14:15 -0800 (PST) Content-Disposition: inline In-Reply-To: <1390892826-26973-1-git-send-email-benjamin.widawsky@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Ben Widawsky Cc: Intel GFX , Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org On Mon, Jan 27, 2014 at 11:07:00PM -0800, Ben Widawsky wrote: > There are cases where we want to know if there is a full, or aliased > PPGTT. Currently, in fact the only distinction we ever need to make is > when we're using full PPGTT. > > This patch is simply to promote readability and clarify for the > confusing existing usage where "aliasing" meant aliasing and full. > > v2: Remove USES_ALIASING_PPGTT since there are currently no cases where > we need to check if we're using aliasing, but not full PPGTT. (Daniel) > > Cc: Daniel Vetter > Signed-off-by: Ben Widawsky Queued for -next, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/i915_drv.h | 5 +++-- > drivers/gpu/drm/i915/i915_gem_context.c | 6 +++--- > 2 files changed, 6 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 4a86d56..d08064e 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1839,8 +1839,9 @@ struct drm_i915_file_private { > > #define HAS_HW_CONTEXTS(dev) (INTEL_INFO(dev)->gen >= 6) > #define HAS_ALIASING_PPGTT(dev) (INTEL_INFO(dev)->gen >= 6 && !IS_VALLEYVIEW(dev)) > -#define HAS_PPGTT(dev) (INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev) && !IS_BROADWELL(dev)) > -#define USES_ALIASING_PPGTT(dev) intel_enable_ppgtt(dev, false) > +#define HAS_PPGTT(dev) (INTEL_INFO(dev)->gen >= 7 && !IS_VALLEYVIEW(dev) \ > + && !IS_BROADWELL(dev)) > +#define USES_PPGTT(dev) intel_enable_ppgtt(dev, false) > #define USES_FULL_PPGTT(dev) intel_enable_ppgtt(dev, true) > > #define HAS_OVERLAY(dev) (INTEL_INFO(dev)->has_overlay) > diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c > index 1c94082..5d4183f 100644 > --- a/drivers/gpu/drm/i915/i915_gem_context.c > +++ b/drivers/gpu/drm/i915/i915_gem_context.c > @@ -142,7 +142,7 @@ void i915_gem_context_free(struct kref *ctx_ref) > struct i915_hw_ppgtt *ppgtt = NULL; > > /* We refcount even the aliasing PPGTT to keep the code symmetric */ > - if (USES_ALIASING_PPGTT(ctx->obj->base.dev)) > + if (USES_PPGTT(ctx->obj->base.dev)) > ppgtt = ctx_to_ppgtt(ctx); > > /* XXX: Free up the object before tearing down the address space, in > @@ -291,7 +291,7 @@ i915_gem_create_context(struct drm_device *dev, > > dev_priv->mm.aliasing_ppgtt = ppgtt; > } > - } else if (USES_ALIASING_PPGTT(dev)) { > + } else if (USES_PPGTT(dev)) { > /* For platforms which only have aliasing PPGTT, we fake the > * address space and refcounting. */ > ctx->vm = &dev_priv->mm.aliasing_ppgtt->base; > @@ -373,7 +373,7 @@ int i915_gem_context_init(struct drm_device *dev) > } > > dev_priv->ring[RCS].default_context = > - i915_gem_create_context(dev, NULL, USES_ALIASING_PPGTT(dev)); > + i915_gem_create_context(dev, NULL, USES_PPGTT(dev)); > > if (IS_ERR_OR_NULL(dev_priv->ring[RCS].default_context)) { > DRM_DEBUG_DRIVER("Disabling HW Contexts; create failed %ld\n", > -- > 1.8.5.3 > -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch