From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 16/28] drm/i915: WaApplyL3ControlAndL3ChickenMode isn't applicable for VLV Date: Tue, 28 Jan 2014 16:13:52 +0200 Message-ID: <20140128141352.GA9454@intel.com> References: <1390419184-4450-1-git-send-email-ville.syrjala@linux.intel.com> <1390419184-4450-17-git-send-email-ville.syrjala@linux.intel.com> <20140128132352.GA7444@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 0620FFC5D9 for ; Tue, 28 Jan 2014 06:13:55 -0800 (PST) Content-Disposition: inline In-Reply-To: <20140128132352.GA7444@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Daniel Vetter Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, Jan 28, 2014 at 02:24:42PM +0100, Daniel Vetter wrote: > On Wed, Jan 22, 2014 at 09:32:52PM +0200, ville.syrjala@linux.intel.com w= rote: > > From: Ville Syrj=E4l=E4 > > = > > WaApplyL3ControlAndL3ChickenMode is only listed for IVB and HSW in > > W/A database and BSpec. > > = > > Signed-off-by: Ville Syrj=E4l=E4 > > --- > > drivers/gpu/drm/i915/intel_pm.c | 2 -- > > 1 file changed, 2 deletions(-) > > = > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/int= el_pm.c > > index 895046f..62d339b 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -4930,8 +4930,6 @@ static void valleyview_init_clock_gating(struct d= rm_device *dev) > > = > > /* WaDisableL3CacheAging:vlv */ > > I915_WRITE(GEN7_L3CNTLREG1, I915_READ(GEN7_L3CNTLREG1) | GEN7_L3AGDIS= ); > > - /* WaApplyL3ControlAndL3ChickenMode:vlv */ > > - I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER, GEN7_WA_L3_CHICKEN_MODE); > = > This one doesn't seem to be here ... is some earlier patch which I haven't > merged yet adding this? Can't we just fold this in? ? I see you alreay applied this patch. Are ou trying to put it in twice? IIRC in the past we applied one workaround three times, now we're trying to not apply one twice :) > -Daniel > = > > = > > /* WaForceL3Serialization:vlv */ > > I915_WRITE(GEN7_L3SQCREG4, I915_READ(GEN7_L3SQCREG4) & > > -- = > > 1.8.3.2 > > = > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > = > -- = > Daniel Vetter > Software Engineer, Intel Corporation > +41 (0) 79 365 57 48 - http://blog.ffwll.ch -- = Ville Syrj=E4l=E4 Intel OTC