From: Ben Widawsky <ben@bwidawsk.net>
To: "Chris Wilson" <chris@chris-wilson.co.uk>,
"Daniel Vetter" <daniel@ffwll.ch>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Ben Widawsky" <benjamin.widawsky@intel.com>,
"Intel GFX" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 06/13] drm/i915/bdw: implement semaphore signal
Date: Tue, 11 Feb 2014 13:48:22 -0800 [thread overview]
Message-ID: <20140211214821.GA2219@bwidawsk.net> (raw)
In-Reply-To: <20140130133541.GK29091@nuc-i3427.alporthouse.com>
On Thu, Jan 30, 2014 at 01:35:41PM +0000, Chris Wilson wrote:
> On Thu, Jan 30, 2014 at 02:18:32PM +0100, Daniel Vetter wrote:
> > On Thu, Jan 30, 2014 at 1:46 PM, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> > > Oh. So they changed how post-sync writes operated - this should be a
> > > separate fix for stable I believe (so that batches are not run before we
> > > have finished invalidating the TLBs required).
> >
> > We have an igt to exercise tlb invalidation stuff, which runs on all
> > rings. But it only runs a batch, so only uses the CS tlb. Do we need
> > to extend this?
>
> So the spec says:
>
> Pipe Control Flush Enable (IVB+)
> If ENABLED, the PIPE_CONTROL command will wait until all previous writes
> of immediate data from post sync circles are complete before executing
> the next command.
>
> Post Sync Operation
> This field specifies an optional action to be taken upon completion of
> the synchronization operation.
>
> TLB Invalidate
> If ENABLED, all TLBs belonging to Render Engine will be invalidated once
> the flush operation is complete.
>
> Command Streamer Stall Enable
> If ENABLED, the sync operation will not occur until all previous flush
> operations pending a completion of those previous flushes will complete,
> including the flush produced from this command. This enables the command
> to act similar to the legacy MI_FLUSH command.
>
> Going by that, the order is
>
> flush, stall, TLB invalidate / post-sync op, [pipe control flush]
>
> Based on my reading of the above (which unless someone has a more
> definitive source) says that without the CONTROL_FLUSH_ENABLE, the CS
> can continue operations as soon as the flush is complete - in parallel
> to the TLB invalidate. Adding CONTROL_FLUSH_ENABLE would then stall the
> CS until the post-sync operation completes. That still leaves the
> possibility that the TLB invalidate is being performed in parallel and
> is itself provides no CS sync.
> -Chris
>
> --
> Chris Wilson, Intel Open Source Technology Centre
so.... what the verdict?
--
Ben Widawsky, Intel Open Source Technology Center
next prev parent reply other threads:[~2014-02-11 21:48 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-29 19:55 [PATCH 00/13] [REPOST] Broadwell HW semaphores Ben Widawsky
2014-01-29 19:55 ` [PATCH 01/13] drm/i915: Move semaphore specific ring members to struct Ben Widawsky
2014-01-29 19:55 ` [PATCH 02/13] drm/i915: Virtualize the ringbuffer signal func Ben Widawsky
2014-01-29 19:55 ` [PATCH 03/13] drm/i915: Move ring_begin to signal() Ben Widawsky
2014-01-29 19:55 ` [PATCH 04/13] drm/i915: Make semaphore updates more precise Ben Widawsky
2014-01-30 11:25 ` Ville Syrjälä
2014-02-11 16:08 ` Ben Widawsky
2014-02-11 17:13 ` Ville Syrjälä
2014-02-11 20:20 ` [PATCH] [v2] " Ben Widawsky
2014-02-11 20:53 ` Ville Syrjälä
2014-02-11 21:50 ` Ben Widawsky
2014-01-29 19:55 ` [PATCH 05/13] drm/i915: gen specific ring init Ben Widawsky
2014-01-29 19:55 ` [PATCH 06/13] drm/i915/bdw: implement semaphore signal Ben Widawsky
2014-01-30 12:38 ` Ville Syrjälä
2014-01-30 12:46 ` Chris Wilson
2014-01-30 13:18 ` Daniel Vetter
2014-01-30 13:25 ` Chris Wilson
2014-01-30 13:35 ` Chris Wilson
2014-02-11 21:48 ` Ben Widawsky [this message]
2014-02-11 22:23 ` Chris Wilson
2014-02-11 22:25 ` Ben Widawsky
2014-02-11 22:28 ` Chris Wilson
2014-02-11 22:11 ` Ben Widawsky
2014-02-11 22:22 ` Ben Widawsky
2014-02-11 23:01 ` Ben Widawsky
2014-02-12 9:29 ` Ville Syrjälä
2014-01-29 19:55 ` [PATCH 07/13] drm/i915/bdw: implement semaphore wait Ben Widawsky
2014-01-30 12:48 ` Ville Syrjälä
2014-01-29 19:55 ` [PATCH 08/13] drm/i915: FORCE_RESTORE for gen8 semaphores Ben Widawsky
2014-01-29 19:55 ` [PATCH 09/13] drm/i915/bdw: poll semaphores Ben Widawsky
2014-01-30 13:26 ` Ville Syrjälä
2014-01-29 19:55 ` [PATCH 10/13] drm/i915: Extract semaphore error collection Ben Widawsky
2014-01-29 19:55 ` [PATCH 11/13] drm/i915/bdw: collect semaphore error state Ben Widawsky
2014-01-30 14:53 ` Ville Syrjälä
2014-01-30 14:58 ` Chris Wilson
2014-02-12 0:19 ` Ben Widawsky
2014-02-12 0:23 ` Ben Widawsky
2014-01-29 19:55 ` [PATCH 12/13] drm/i915: unleash semaphores on gen8 Ben Widawsky
2014-01-29 19:55 ` [PATCH 13/13] drm/i915: semaphore debugfs Ben Widawsky
-- strict thread matches above, loose matches on Subject: below --
2014-02-20 6:19 [PATCH 01/13] drm/i915: Move semaphore specific ring members to struct Ben Widawsky
2014-02-20 6:19 ` [PATCH 06/13] drm/i915/bdw: implement semaphore signal Ben Widawsky
2014-02-24 13:10 ` Ville Syrjälä
2014-03-05 12:24 ` Ville Syrjälä
2014-04-29 21:52 [PATCH 00/13] [REPOST] BDW Semaphores Ben Widawsky
2014-04-29 21:52 ` [PATCH 06/13] drm/i915/bdw: implement semaphore signal Ben Widawsky
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