From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 06/13] drm/i915/bdw: implement semaphore signal Date: Mon, 24 Feb 2014 15:10:26 +0200 Message-ID: <20140224131026.GS3852@intel.com> References: <1392877166-9195-1-git-send-email-benjamin.widawsky@intel.com> <1392877166-9195-6-git-send-email-benjamin.widawsky@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 5B2A0FAA62 for ; Mon, 24 Feb 2014 05:10:30 -0800 (PST) Content-Disposition: inline In-Reply-To: <1392877166-9195-6-git-send-email-benjamin.widawsky@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Ben Widawsky Cc: Intel GFX , Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org On Wed, Feb 19, 2014 at 10:19:19PM -0800, Ben Widawsky wrote: > @@ -634,6 +641,85 @@ static void render_ring_cleanup(struct intel_ring_bu= ffer *ring) > ring->scratch.obj =3D NULL; > } > = > +static int gen8_rcs_signal(struct intel_ring_buffer *signaller, > + unsigned int num_dwords) > +{ > +#define MBOX_UPDATE_DWORDS 8 > + struct drm_device *dev =3D signaller->dev; > + struct drm_i915_private *dev_priv =3D dev->dev_private; > + struct intel_ring_buffer *waiter; > + int i, ret, num_rings; > + > + num_rings =3D hweight_long(INTEL_INFO(dev)->ring_mask); Again hweight32() would be enough. -- = Ville Syrj=E4l=E4 Intel OTC