From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: use backlight legacy combination mode also for i945gm Date: Tue, 25 Feb 2014 12:47:38 +0200 Message-ID: <20140225104738.GW3852@intel.com> References: <1393319696-26249-1-git-send-email-jani.nikula@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 0B194FADA3 for ; Tue, 25 Feb 2014 02:47:43 -0800 (PST) Content-Disposition: inline In-Reply-To: <1393319696-26249-1-git-send-email-jani.nikula@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Jani Nikula Cc: intel-gfx@lists.freedesktop.org, luiorpe1@gmail.com List-Id: intel-gfx@lists.freedesktop.org On Tue, Feb 25, 2014 at 11:14:56AM +0200, Jani Nikula wrote: > i945gm also seems to use and need the legacy combination mode bit in > BLC_PWM_CTL. > = > Reported-and-tested-by: Luis Ortega > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=3D75001 > Signed-off-by: Jani Nikula > = > --- > = > My scarce gen3 specs do not say anything about bit 16 of > BLC_PWM_CTL. Bits 31:17 are similar to gen2, which does have bit 16 > specified as legacy mode. The spec is funny. It looks like the bit just fell off by accident. > = > Per the bug, we clearly should interpret bit 16 as legacy mode also for > I945GM, but how about other gen3 hardware? Thoughts? In that case I would expect 915 to be the same as chronologically it sits between gen2 and 945. PNV might be different. So based on that reasoning the check could be reduced to just !IS_PINEVIEW. > = > I'm inclined to go with this, and fix others if they are reported. > --- > drivers/gpu/drm/i915/intel_panel.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/in= tel_panel.c > index 5bc3f6ea1014..b3df5b90f79f 100644 > --- a/drivers/gpu/drm/i915/intel_panel.c > +++ b/drivers/gpu/drm/i915/intel_panel.c > @@ -689,7 +689,7 @@ static void i9xx_enable_backlight(struct intel_connec= tor *connector) > freq /=3D 0xff; > = > ctl =3D freq << 17; > - if (IS_GEN2(dev) && panel->backlight.combination_mode) > + if (panel->backlight.combination_mode) > ctl |=3D BLM_LEGACY_MODE; > if (IS_PINEVIEW(dev) && panel->backlight.active_low_pwm) > ctl |=3D BLM_POLARITY_PNV; > @@ -970,7 +970,7 @@ static int i9xx_setup_backlight(struct intel_connecto= r *connector) > = > ctl =3D I915_READ(BLC_PWM_CTL); > = > - if (IS_GEN2(dev)) > + if (IS_GEN2(dev) || IS_I945GM(dev)) > panel->backlight.combination_mode =3D ctl & BLM_LEGACY_MODE; > = > if (IS_PINEVIEW(dev)) > -- = > 1.7.9.5 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC