From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Kenneth Graunke <kenneth@whitecape.org>
Cc: intel-gfx@lists.freedesktop.org, ben@bwidawsk.net
Subject: Re: [PATCH 1/2] drm/i915: Add a partial instruction shootdown workaround on Broadwell.
Date: Thu, 27 Feb 2014 10:43:24 +0200 [thread overview]
Message-ID: <20140227084324.GG3852@intel.com> (raw)
In-Reply-To: <1393487971-739-1-git-send-email-kenneth@whitecape.org>
On Wed, Feb 26, 2014 at 11:59:30PM -0800, Kenneth Graunke wrote:
> I believe this will be necessary on production hardware.
>
> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 3 +++
> drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> 2 files changed, 7 insertions(+)
>
> I just realized tonight that my workarounds series never got merged.
>
> After reviewing Ben and Chris's comments, I agree with all of them, so
> I've dropped the unnecessary patches. I also believe I shouldn't need
> the pre-production workarounds I sent last time, so I've dropped those.
>
> These two should apply to production hardware, so we probably want them.
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index ad75ff7..f36d5e0 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5050,6 +5050,9 @@
> #define GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE (1<<10)
> #define GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE (1<<3)
>
> +#define GEN8_ROW_CHICKEN 0xe4f0
> +#define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8)
> +
> #define GEN7_ROW_CHICKEN2 0xe4f4
> #define GEN7_ROW_CHICKEN2_GT2 0xf4f4
> #define DOP_CLOCK_GATING_DISABLE (1<<0)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 4f01b04..df8ad21 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4838,6 +4838,10 @@ static void gen8_init_clock_gating(struct drm_device *dev)
> /* FIXME(BDW): Check all the w/a, some might only apply to
> * pre-production hw. */
>
> + /* WaDisablePartialInstShootdown */
+:bdw
Apart from that:
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> + I915_WRITE(GEN8_ROW_CHICKEN,
> + _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE));
> +
> /*
> * This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for
> * pre-production hardware
> --
> 1.8.4.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
next prev parent reply other threads:[~2014-02-27 8:43 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-27 7:59 [PATCH 1/2] drm/i915: Add a partial instruction shootdown workaround on Broadwell Kenneth Graunke
2014-02-27 7:59 ` [PATCH 2/2] drm/i915: Add thread stall DOP clock gating " Kenneth Graunke
2014-02-27 8:43 ` Ville Syrjälä
2014-02-27 9:08 ` Ville Syrjälä
2014-02-27 8:43 ` Ville Syrjälä [this message]
2014-02-28 0:05 ` [PATCH 1/2] drm/i915: Add a partial instruction shootdown " Ben Widawsky
2014-03-05 14:48 ` Daniel Vetter
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