From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 1/2] drm/i915: Add a partial instruction shootdown workaround on Broadwell. Date: Thu, 27 Feb 2014 10:43:24 +0200 Message-ID: <20140227084324.GG3852@intel.com> References: <1393487971-739-1-git-send-email-kenneth@whitecape.org> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 515B8FB599 for ; Thu, 27 Feb 2014 00:43:46 -0800 (PST) Content-Disposition: inline In-Reply-To: <1393487971-739-1-git-send-email-kenneth@whitecape.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Kenneth Graunke Cc: intel-gfx@lists.freedesktop.org, ben@bwidawsk.net List-Id: intel-gfx@lists.freedesktop.org On Wed, Feb 26, 2014 at 11:59:30PM -0800, Kenneth Graunke wrote: > I believe this will be necessary on production hardware. > = > Signed-off-by: Kenneth Graunke > --- > drivers/gpu/drm/i915/i915_reg.h | 3 +++ > drivers/gpu/drm/i915/intel_pm.c | 4 ++++ > 2 files changed, 7 insertions(+) > = > I just realized tonight that my workarounds series never got merged. > = > After reviewing Ben and Chris's comments, I agree with all of them, so > I've dropped the unnecessary patches. I also believe I shouldn't need > the pre-production workarounds I sent last time, so I've dropped those. > = > These two should apply to production hardware, so we probably want them. > = > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_= reg.h > index ad75ff7..f36d5e0 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -5050,6 +5050,9 @@ > #define GEN7_SINGLE_SUBSCAN_DISPATCH_ENABLE (1<<10) > #define GEN7_PSD_SINGLE_PORT_DISPATCH_ENABLE (1<<3) > = > +#define GEN8_ROW_CHICKEN 0xe4f0 > +#define PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE (1<<8) > + > #define GEN7_ROW_CHICKEN2 0xe4f4 > #define GEN7_ROW_CHICKEN2_GT2 0xf4f4 > #define DOP_CLOCK_GATING_DISABLE (1<<0) > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel= _pm.c > index 4f01b04..df8ad21 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4838,6 +4838,10 @@ static void gen8_init_clock_gating(struct drm_devi= ce *dev) > /* FIXME(BDW): Check all the w/a, some might only apply to > * pre-production hw. */ > = > + /* WaDisablePartialInstShootdown */ +:bdw Apart from that: Reviewed-by: Ville Syrj=E4l=E4 > + I915_WRITE(GEN8_ROW_CHICKEN, > + _MASKED_BIT_ENABLE(PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE)); > + > /* > * This GEN8_CENTROID_PIXEL_OPT_DIS W/A is only needed for > * pre-production hardware > -- = > 1.8.4.2 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC