[PATCH] Revert "drm/i915: enable HiZ Raw Stall Optimization on IVB"

[PATCH] Revert "drm/i915: enable HiZ Raw Stall Optimization on IVB"

[Chris Wilson]

This reverts commit 116f2b6da868dec7539103574d0421cd6221e931.

This optimization causes widespread corruption in games, and even in
glxgears, on my ivb:gt1. The corruption appears like z-fighting of
overlapping polygons in the HiZ buffer.

The observation ties in very closely with the description of the
optimization disabled by default on IVB:

"The Hierarchical Z RAW Stall Optimization allows non-overlapping
polygons in the same 8x4 pixel/sample area to be processed without
stalling waiting for the earlier ones to write to Hierarchical Z
buffer."

No reason is given for why it is disabled by default, usually for such
optimizations it is that it is incomplete. However, there is no
indication whether this a gt1 only issue either. Before considering
reenabling this optimization, I would first suggest reproducing the
corruption in piglit.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75623
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Chia-I Wu <olv@lunarg.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b016d9bcd7c1..6b4d1a89e9bc 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4908,9 +4908,11 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
 
 	gen7_setup_fixed_func_scheduler(dev_priv);
 
-	/* enable HiZ Raw Stall Optimization */
-	I915_WRITE(CACHE_MODE_0_GEN7,
-		   _MASKED_BIT_DISABLE(HIZ_RAW_STALL_OPT_DISABLE));
+	if (0) { /* causes HiZ corruption on ivb:gt1 */
+		/* enable HiZ Raw Stall Optimization */
+		I915_WRITE(CACHE_MODE_0_GEN7,
+			   _MASKED_BIT_DISABLE(HIZ_RAW_STALL_OPT_DISABLE));
+	}
 
 	/* WaDisable4x2SubspanOptimization:ivb */
 	I915_WRITE(CACHE_MODE_1,
-- 
1.9.0

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Re: [PATCH] Revert "drm/i915: enable HiZ Raw Stall Optimization on IVB"

[Chia-I Wu]

On Tue, Mar 4, 2014 at 5:41 PM, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> This reverts commit 116f2b6da868dec7539103574d0421cd6221e931.
>
> This optimization causes widespread corruption in games, and even in
> glxgears, on my ivb:gt1. The corruption appears like z-fighting of
> overlapping polygons in the HiZ buffer.
>
> The observation ties in very closely with the description of the
> optimization disabled by default on IVB:
>
> "The Hierarchical Z RAW Stall Optimization allows non-overlapping
> polygons in the same 8x4 pixel/sample area to be processed without
> stalling waiting for the earlier ones to write to Hierarchical Z
> buffer."
>
> No reason is given for why it is disabled by default, usually for such
> optimizations it is that it is incomplete. However, there is no
> indication whether this a gt1 only issue either. Before considering
> reenabling this optimization, I would first suggest reproducing the
> corruption in piglit.
I wonder if Haswell GT1 is affected too (that's in another commit).  I
do not own a GT1 for either GEN to verify the issue or to create a
sensible piglit test.

>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75623
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Chia-I Wu <olv@lunarg.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index b016d9bcd7c1..6b4d1a89e9bc 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4908,9 +4908,11 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
>
>         gen7_setup_fixed_func_scheduler(dev_priv);
>
> -       /* enable HiZ Raw Stall Optimization */
> -       I915_WRITE(CACHE_MODE_0_GEN7,
> -                  _MASKED_BIT_DISABLE(HIZ_RAW_STALL_OPT_DISABLE));
> +       if (0) { /* causes HiZ corruption on ivb:gt1 */
> +               /* enable HiZ Raw Stall Optimization */
> +               I915_WRITE(CACHE_MODE_0_GEN7,
> +                          _MASKED_BIT_DISABLE(HIZ_RAW_STALL_OPT_DISABLE));
> +       }
>
>         /* WaDisable4x2SubspanOptimization:ivb */
>         I915_WRITE(CACHE_MODE_1,
> --
> 1.9.0
>



-- 
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Re: [PATCH] Revert "drm/i915: enable HiZ Raw Stall Optimization on IVB"

[Ville Syrjälä]

On Tue, Mar 04, 2014 at 10:38:58PM +0800, Chia-I Wu wrote:
> On Tue, Mar 4, 2014 at 5:41 PM, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> > This reverts commit 116f2b6da868dec7539103574d0421cd6221e931.
> >
> > This optimization causes widespread corruption in games, and even in
> > glxgears, on my ivb:gt1. The corruption appears like z-fighting of
> > overlapping polygons in the HiZ buffer.
> >
> > The observation ties in very closely with the description of the
> > optimization disabled by default on IVB:
> >
> > "The Hierarchical Z RAW Stall Optimization allows non-overlapping
> > polygons in the same 8x4 pixel/sample area to be processed without
> > stalling waiting for the earlier ones to write to Hierarchical Z
> > buffer."
> >
> > No reason is given for why it is disabled by default, usually for such
> > optimizations it is that it is incomplete. However, there is no
> > indication whether this a gt1 only issue either. Before considering
> > reenabling this optimization, I would first suggest reproducing the
> > corruption in piglit.
> I wonder if Haswell GT1 is affected too (that's in another commit).  I
> do not own a GT1 for either GEN to verify the issue or to create a
> sensible piglit test.

I'm seeing corruption on IVB GT2 as well. I might be more blind than
Chris or it's less subtle on GT2 since it took me a while to spot it.
Seems to be easiest to spot in Epic citadel when you go inside the
temple. I can't spot the same corruption on HSW GT3.

> 
> >
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75623
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Chia-I Wu <olv@lunarg.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 8 +++++---
> >  1 file changed, 5 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index b016d9bcd7c1..6b4d1a89e9bc 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -4908,9 +4908,11 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
> >
> >         gen7_setup_fixed_func_scheduler(dev_priv);
> >
> > -       /* enable HiZ Raw Stall Optimization */
> > -       I915_WRITE(CACHE_MODE_0_GEN7,
> > -                  _MASKED_BIT_DISABLE(HIZ_RAW_STALL_OPT_DISABLE));
> > +       if (0) { /* causes HiZ corruption on ivb:gt1 */
> > +               /* enable HiZ Raw Stall Optimization */
> > +               I915_WRITE(CACHE_MODE_0_GEN7,
> > +                          _MASKED_BIT_DISABLE(HIZ_RAW_STALL_OPT_DISABLE));
> > +       }
> >
> >         /* WaDisable4x2SubspanOptimization:ivb */
> >         I915_WRITE(CACHE_MODE_1,
> > --
> > 1.9.0
> >
> 
> 
> 
> -- 
> olv@LunarG.com

-- 
Ville Syrjälä
Intel OTC

Re: [PATCH] Revert "drm/i915: enable HiZ Raw Stall Optimization on IVB"

[Daniel Vetter]

On Tue, Mar 04, 2014 at 05:06:22PM +0200, Ville Syrjälä wrote:
> On Tue, Mar 04, 2014 at 10:38:58PM +0800, Chia-I Wu wrote:
> > On Tue, Mar 4, 2014 at 5:41 PM, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> > > This reverts commit 116f2b6da868dec7539103574d0421cd6221e931.
> > >
> > > This optimization causes widespread corruption in games, and even in
> > > glxgears, on my ivb:gt1. The corruption appears like z-fighting of
> > > overlapping polygons in the HiZ buffer.
> > >
> > > The observation ties in very closely with the description of the
> > > optimization disabled by default on IVB:
> > >
> > > "The Hierarchical Z RAW Stall Optimization allows non-overlapping
> > > polygons in the same 8x4 pixel/sample area to be processed without
> > > stalling waiting for the earlier ones to write to Hierarchical Z
> > > buffer."
> > >
> > > No reason is given for why it is disabled by default, usually for such
> > > optimizations it is that it is incomplete. However, there is no
> > > indication whether this a gt1 only issue either. Before considering
> > > reenabling this optimization, I would first suggest reproducing the
> > > corruption in piglit.
> > I wonder if Haswell GT1 is affected too (that's in another commit).  I
> > do not own a GT1 for either GEN to verify the issue or to create a
> > sensible piglit test.
> 
> I'm seeing corruption on IVB GT2 as well. I might be more blind than
> Chris or it's less subtle on GT2 since it took me a while to spot it.
> Seems to be easiest to spot in Epic citadel when you go inside the
> temple. I can't spot the same corruption on HSW GT3.

Queued for -next, thanks for the patch. We can tackle hsw when that on
blows up ...
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

Re: [PATCH] Revert "drm/i915: enable HiZ Raw Stall Optimization on IVB"

[Chia-I Wu]

[-- Attachment #1: Type: text/plain, Size: 2155 bytes --]

On Wed, Mar 5, 2014 at 2:38 AM, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Tue, Mar 04, 2014 at 05:06:22PM +0200, Ville Syrjälä wrote:
>> On Tue, Mar 04, 2014 at 10:38:58PM +0800, Chia-I Wu wrote:
>> > On Tue, Mar 4, 2014 at 5:41 PM, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>> > > This reverts commit 116f2b6da868dec7539103574d0421cd6221e931.
>> > >
>> > > This optimization causes widespread corruption in games, and even in
>> > > glxgears, on my ivb:gt1. The corruption appears like z-fighting of
>> > > overlapping polygons in the HiZ buffer.
>> > >
>> > > The observation ties in very closely with the description of the
>> > > optimization disabled by default on IVB:
>> > >
>> > > "The Hierarchical Z RAW Stall Optimization allows non-overlapping
>> > > polygons in the same 8x4 pixel/sample area to be processed without
>> > > stalling waiting for the earlier ones to write to Hierarchical Z
>> > > buffer."
>> > >
>> > > No reason is given for why it is disabled by default, usually for such
>> > > optimizations it is that it is incomplete. However, there is no
>> > > indication whether this a gt1 only issue either. Before considering
>> > > reenabling this optimization, I would first suggest reproducing the
>> > > corruption in piglit.
>> > I wonder if Haswell GT1 is affected too (that's in another commit).  I
>> > do not own a GT1 for either GEN to verify the issue or to create a
>> > sensible piglit test.
>>
>> I'm seeing corruption on IVB GT2 as well. I might be more blind than
>> Chris or it's less subtle on GT2 since it took me a while to spot it.
>> Seems to be easiest to spot in Epic citadel when you go inside the
>> temple. I can't spot the same corruption on HSW GT3.
>
> Queued for -next, thanks for the patch. We can tackle hsw when that on
> blows up ...
I've created a simple demo that demonstrates the problem on IVB GT2,
FWIW.  The patch is against mesa-demos.  Not sure if there is a need
to make it a piglit test.



> -Daniel
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> +41 (0) 79 365 57 48 - http://blog.ffwll.ch



-- 
olv@LunarG.com

[-- Attachment #2: 0001-ivb-hiz-demonstrate-hiz-depth-stall-opt-bug-on-IVB.patch --]
[-- Type: text/x-patch, Size: 3159 bytes --]

From 00f78fa9c2162e97ff89e9131c53c7f7cd557949 Mon Sep 17 00:00:00 2001
From: Chia-I Wu <olvaffe@gmail.com>
Date: Wed, 12 Mar 2014 15:12:43 +0800
Subject: [PATCH] ivb-hiz: demonstrate hiz depth stall opt bug on IVB

---
 src/demos/Makefile.am |   1 +
 src/demos/ivb-hiz.c   | 110 ++++++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 111 insertions(+)
 create mode 100644 src/demos/ivb-hiz.c

diff --git a/src/demos/Makefile.am b/src/demos/Makefile.am
index 41603fa..2333476 100644
--- a/src/demos/Makefile.am
+++ b/src/demos/Makefile.am
@@ -32,6 +32,7 @@ AM_LDFLAGS = \
 
 if HAVE_GLUT
 bin_PROGRAMS = \
+	ivb-hiz \
 	arbfplight \
 	arbfslight \
 	arbocclude \
diff --git a/src/demos/ivb-hiz.c b/src/demos/ivb-hiz.c
new file mode 100644
index 0000000..0404d80
--- /dev/null
+++ b/src/demos/ivb-hiz.c
@@ -0,0 +1,110 @@
+#include <math.h>
+#include <stdlib.h>
+#include <string.h>
+#include <time.h>
+#include "glut_wrap.h"
+
+static GLfloat radius = 0.7f;
+static GLboolean grid = GL_FALSE;
+static int win_width, win_height;
+
+static void
+draw(void)
+{
+   const int num_triangles = 100;
+   const GLfloat delta = M_PI / 2.0f / num_triangles;
+   int i;
+
+   glClear(GL_COLOR_BUFFER_BIT | GL_DEPTH_BUFFER_BIT);
+
+   glBegin(GL_TRIANGLE_FAN);
+   glColor3f(1.0, 1.0, 1.0);
+   glVertex2f(0.0f, 1.0f);
+   glVertex2f(radius, 1.0f);
+   for (i = 1; i <= num_triangles; i++) {
+      GLfloat angle = i * delta;
+      glVertex2f(radius * cos(angle), 1.0f - radius * sin(angle));
+   }
+   glEnd();
+
+   if (grid) {
+      glDisable(GL_DEPTH_TEST);
+      glColor3f(1.0, 0.0, 0.0);
+
+      glPushMatrix();
+      glLoadIdentity();
+      glBegin(GL_LINES);
+
+      for (i = 0; 8 * i < win_width; i++) {
+         glVertex2f(8 * i + 0.5f, 0.0f);
+         glVertex2f(8 * i + 0.5f, win_height);
+      }
+
+      for (i = 0; 8 * i < win_height; i++) {
+         glVertex2f(0.0f, win_height - 8 * i - 0.5f);
+         glVertex2f(win_width, win_height - 8 * i - 0.5f);
+      }
+
+      glEnd();
+      glPopMatrix();
+      glEnable(GL_DEPTH_TEST);
+   }
+
+   glutSwapBuffers();
+   glutPostRedisplay();
+}
+
+static void
+key(unsigned char k, int x, int y)
+{
+  switch (k) {
+  case 'r':
+     radius -= 0.01f;
+     break;
+  case 'R':
+     radius += 0.01f;
+     break;
+  case 'g':
+     grid = !grid;
+     break;
+  case 27:  /* Escape */
+    exit(0);
+  }
+}
+
+static void
+reshape(int width, int height)
+{
+   glViewport(0, 0, width, height);
+
+   glMatrixMode(GL_PROJECTION);
+   glLoadIdentity();
+   glOrtho(0.0, width, 0.0, height, 1.0, -1.0);
+   glMatrixMode(GL_MODELVIEW);
+   glLoadIdentity();
+
+   glScalef(width, height, 1.0f);
+
+   win_width = width;
+   win_height = height;
+}
+
+int main(int argc, char *argv[])
+{
+  glutInitWindowSize(400, 400);
+  glutInit(&argc, argv);
+
+  glutInitDisplayMode(GLUT_RGBA | GLUT_DEPTH | GLUT_DOUBLE);
+
+  glutCreateWindow("HiZ");
+
+  glEnable(GL_DEPTH_TEST);
+  //glDepthFunc(GL_LEQUAL);
+
+  glutDisplayFunc(draw);
+  glutReshapeFunc(reshape);
+  glutKeyboardFunc(key);
+
+  glutMainLoop();
+  return 0;             /* ANSI C requires main to return int. */
+}
-- 
1.8.3.1


[-- Attachment #3: Type: text/plain, Size: 159 bytes --]

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