From mboxrd@z Thu Jan 1 00:00:00 1970 From: Damien Lespiau Subject: Re: [PATCH 1/3] drm/i915: Don't clobber CHICKEN_PIPESL_1 on BDW Date: Wed, 5 Mar 2014 12:09:17 +0000 Message-ID: <20140305120917.GA23022@strange.icx.intel.com> References: <1394017547-18234-1-git-send-email-ville.syrjala@linux.intel.com> <1394017547-18234-2-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 76ACDFA5EC for ; Wed, 5 Mar 2014 04:09:21 -0800 (PST) Content-Disposition: inline In-Reply-To: <1394017547-18234-2-git-send-email-ville.syrjala@linux.intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: ville.syrjala@linux.intel.com Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Mar 05, 2014 at 01:05:45PM +0200, ville.syrjala@linux.intel.com wro= te: > From: Ville Syrj=E4l=E4 > = > Misplaced parens cause us to totally clobber the CHICKEN_PIPESL_1 > registers with 0xffffffff. Move the parens to the correct place > to avoid this. > = > In particular this caused bit 30 of said registers to be set, which > caused the sprite CSC to produce incorrect results. > = > Cc: stable@vger.kernel.org > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=3D72220 > Signed-off-by: Ville Syrj=E4l=E4 Reviewed-by: Damien Lespiau -- = Damien > --- > drivers/gpu/drm/i915/intel_pm.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel= _pm.c > index 6436b70..245d3ae 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -4832,8 +4832,8 @@ static void gen8_init_clock_gating(struct drm_devic= e *dev) > /* WaPsrDPRSUnmaskVBlankInSRD:bdw */ > for_each_pipe(i) { > I915_WRITE(CHICKEN_PIPESL_1(i), > - I915_READ(CHICKEN_PIPESL_1(i) | > - DPRS_MASK_VBLANK_SRD)); > + I915_READ(CHICKEN_PIPESL_1(i)) | > + DPRS_MASK_VBLANK_SRD); > } > = > /* Use Force Non-Coherent whenever executing a 3D context. This is a > -- = > 1.8.3.2 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx