From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: Re: [PATCH] drm/i915/bdw: MU_FLUSH_DW a qword instead of dword Date: Wed, 5 Mar 2014 11:05:15 -0800 Message-ID: <20140305190515.GA21029@intel.com> References: <1393954736-1397-1-git-send-email-benjamin.widawsky@intel.com> <20140305092434.GA20735@nuc-i3427.alporthouse.com> <20140305183311.GX17001@phenom.ffwll.local> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-pd0-f176.google.com (mail-pd0-f176.google.com [209.85.192.176]) by gabe.freedesktop.org (Postfix) with ESMTP id 937D6FA8F8 for ; Wed, 5 Mar 2014 11:05:18 -0800 (PST) Received: by mail-pd0-f176.google.com with SMTP id r10so1409206pdi.21 for ; Wed, 05 Mar 2014 11:05:18 -0800 (PST) Content-Disposition: inline In-Reply-To: <20140305183311.GX17001@phenom.ffwll.local> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: intel-gfx-bounces@lists.freedesktop.org Errors-To: intel-gfx-bounces@lists.freedesktop.org To: Daniel Vetter Cc: Intel GFX , Ben Widawsky List-Id: intel-gfx@lists.freedesktop.org On Wed, Mar 05, 2014 at 07:33:11PM +0100, Daniel Vetter wrote: > On Wed, Mar 05, 2014 at 09:24:34AM +0000, Chris Wilson wrote: > > On Tue, Mar 04, 2014 at 09:38:56AM -0800, Ben Widawsky wrote: > > > The actual post sync op is "Write Immediate Data QWord." It is therefore > > > arguable that we should have always done a qword write. > > > > Not really since the spec explicitly says that we can choose either a > > dword or qword write. Note that qword writes also currently require a > > 64 byte alignment. > > Yeah, that's also my reading of the spec - the lenght field selects > whether the hw does a qword or dword write, and the qword needs to be > specially aligned. > -Daniel I think both of you only read this sentence, where I said it was "arguable." The rest of the commit message was what actually mattered. -- Ben Widawsky, Intel Open Source Technology Center