From: Zhenyu Wang <zhenyuw@linux.intel.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] drm/i915: Fix drain latency precision multipler for VLV
Date: Thu, 6 Mar 2014 10:05:08 +0800 [thread overview]
Message-ID: <20140306020508.GO2692@zhen-hp.sh.intel.com> (raw)
In-Reply-To: <20140305165148.GT3852@intel.com>
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On 2014.03.05 18:51:48 +0200, Ville Syrjälä wrote:
> > entries = (clock / 1000) * pixel_size;
> > *plane_prec_mult = (entries > 256) ?
>
> The threshold should also be reduced to 128 entries.
>
hmm, I'll double check if this is really required or not.
> > - DRAIN_LATENCY_PRECISION_32 : DRAIN_LATENCY_PRECISION_16;
> > + DRAIN_LATENCY_PRECISION_64 : DRAIN_LATENCY_PRECISION_32;
> > *plane_dl = (64 * (*plane_prec_mult) * 4) / ((clock / 1000) *
> > pixel_size);
> ^^^^^^^^^^^^^^^^^
> Maybe replace the divisor here w/ just 'entrie' since it's same thing.
> Makes it a bit easier to see the relationship between this and the way
> the precision is selected.
>
yeah, but that might be another seperate patch besides the precision
multipler this one trys to fix.
Thanks for review this.
--
Open Source Technology Center, Intel ltd.
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prev parent reply other threads:[~2014-03-06 2:05 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-27 22:50 [PATCH] drm/i915: Fix drain latency precision multipler for VLV Zhenyu Wang
2014-03-05 16:51 ` Ville Syrjälä
2014-03-06 2:05 ` Zhenyu Wang [this message]
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