From: Daniel Vetter <daniel@ffwll.ch>
To: Chris Wilson <chris@chris-wilson.co.uk>,
Ben Widawsky <benjamin.widawsky@intel.com>,
Intel GFX <intel-gfx@lists.freedesktop.org>,
Ben Widawsky <ben@bwidawsk.net>
Subject: Re: [PATCH 2/2] drm/i915: Correct PPGTT total size
Date: Tue, 11 Mar 2014 21:06:37 +0100 [thread overview]
Message-ID: <20140311200637.GG30571@phenom.ffwll.local> (raw)
In-Reply-To: <20140311122112.GD7348@nuc-i3427.alporthouse.com>
On Tue, Mar 11, 2014 at 12:21:12PM +0000, Chris Wilson wrote:
> On Sat, Mar 08, 2014 at 11:58:17AM -0800, Ben Widawsky wrote:
> > Our code allows have a PPGTT that is smaller than the maximum size for
> > GEN6-GEN7. Though I don't think this actually ever occurs, the code may
> > as well work properly and more importantly look correct by using the
> > variable size instead of the HW max.
>
> Might mention that the num_pd_entries is set during allocation of the
> page directories, and so here we just compute the size for the drm_mm
> range manager (and the variables only exist for consistency with legacy
> GGTT interfaces).
>
> > Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Both merged, thanks for patches&review.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2014-03-11 20:06 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-08 19:58 [PATCH 1/2] drm/i915/bdw: Use scratch page table for GEN8 PPGTT Ben Widawsky
2014-03-08 19:58 ` [PATCH 2/2] drm/i915: Correct PPGTT total size Ben Widawsky
2014-03-11 12:21 ` Chris Wilson
2014-03-11 20:06 ` Daniel Vetter [this message]
2014-03-08 19:59 ` [PATCH 1/2] drm/i915/bdw: Use scratch page table for GEN8 PPGTT Ben Widawsky
2014-03-11 12:24 ` Chris Wilson
2014-03-11 16:39 ` Ben Widawsky
2014-03-11 16:46 ` Chris Wilson
2014-03-11 16:56 ` Ben Widawsky
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