From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Subject: Re: [PATCH v3 2/3] drm/i915/vlv: WA for Turbo and RC6
 to work together.
Date: Thu, 13 Mar 2014 20:57:09 +0200
Message-ID: <20140313185709.GR20292@intel.com>
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To: "S, Deepak" <deepak.s@intel.com>
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On Fri, Mar 14, 2014 at 12:10:45AM +0530, S, Deepak wrote:
> =

> =

> On 3/13/2014 11:47 PM, Ville Syrj=E4l=E4 wrote:
> > On Thu, Mar 13, 2014 at 09:30:17PM +0530, deepak.s@linux.intel.com wrot=
e:
<snip>
> >> @@ -5019,13 +5026,17 @@ enum punit_power_well {
> >>
> >>   #define GEN6_GT_GFX_RC6_LOCKED			0x138104
> >>   #define VLV_COUNTER_CONTROL			0x138104
> >> +#define VLV_RC_COUNTER_CONTROL                  0xFFFF00FF
> >
> > I'd still like to see names for all the bits we frob, and I'd
> > still like to have some kind of an answer to the question whether
> > we really need to enable them all when the w/a is only interested
> > in the rc0 counters.
> =

> I did try with enabling only the rc0 counters, but the busyness =

> calculation was not right. Let me do some more investigation and get =

> back to you on this.

Well, if you tried it and it didn't work right, then I'm already fairly
satisfied with that. It just needs a comment to make it clear why we
enable them all. Of course if you can dig out more details, that's
always a bonus.

-- =

Ville Syrj=E4l=E4
Intel OTC