Re: [PATCH 2/4] drm/i915: Enabling constant alpha drm property

[Damien Lespiau <damien.lespiau@intel.com>]

On Sat, Mar 08, 2014 at 01:51:17PM +0530, sagar.a.kamble@intel.com wrote:
> From: Sagar Kamble <sagar.a.kamble@intel.com>
> 
> This patch enables constant alpha property for Sprite planes.
> Client has to set BIT(DRM_BLEND_CONSTANT_ALPHA) | (8 bit alpha value)
> for applying constant alpha on a plane. To disable constant alpha,
> client has to set BIT(DRM_BLEND_NONE)
> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: David Airlie <airlied@linux.ie>

No need to Cc David on i915 patches, let's spare him from now on.

> Signed-off-by: Sagar Kamble <sagar.a.kamble@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_dma.c     | 11 ++++++-
>  drivers/gpu/drm/i915/i915_drv.h     |  1 +
>  drivers/gpu/drm/i915/i915_reg.h     |  2 ++
>  drivers/gpu/drm/i915/intel_drv.h    |  7 +++++
>  drivers/gpu/drm/i915/intel_sprite.c | 61 ++++++++++++++++++++++++++++++++++++-
>  5 files changed, 80 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index e4d2b9f..286251d 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1897,13 +1897,22 @@ int i915_driver_open(struct drm_device *dev, struct drm_file *file)
>  void i915_driver_lastclose(struct drm_device * dev)
>  {
>  	drm_i915_private_t *dev_priv = dev->dev_private;
> -
> +	struct intel_plane *plane;
>  	/* On gen6+ we refuse to init without kms enabled, but then the drm core
>  	 * goes right around and calls lastclose. Check for this and don't clean
>  	 * up anything. */

Why are you removing the new line between the variable declaration and
the comment?

>  	if (!dev_priv)
>  		return;
>  
> +	if (dev_priv->blend_property) {
> +		list_for_each_entry(plane, &dev->mode_config.plane_list, base.head) {
> +			plane->blend_param.value = BIT(DRM_BLEND_NONE);
> +			drm_object_property_set_value(&plane->base.base,
> +						dev_priv->blend_property,
> +						plane->blend_param.value);
> +		}
> +	}
> +
>  	if (drm_core_check_feature(dev, DRIVER_MODESET)) {
>  		intel_fbdev_restore_mode(dev);
>  		vga_switcheroo_process_delayed_switch();
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2a319ba..8a82fb7 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1604,6 +1604,7 @@ typedef struct drm_i915_private {
>  
>  	struct drm_property *broadcast_rgb_property;
>  	struct drm_property *force_audio_property;
> +	struct drm_property *blend_property;
>  
>  	uint32_t hw_context_size;
>  	struct list_head context_list;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 146609a..292d55d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3772,6 +3772,8 @@ enum punit_power_well {
>  #define   SPRITE_INT_GAMMA_ENABLE	(1<<13)
>  #define   SPRITE_TILED			(1<<10)
>  #define   SPRITE_DEST_KEY		(1<<2)
> +#define	  SPRITE_CONSTANT_ALPHA_ENABLE  (1<<31)
> +#define   SPRITE_CONSTANT_ALPHA_MASK	(0xFF)
>  #define _SPRA_LINOFF		0x70284
>  #define _SPRA_STRIDE		0x70288
>  #define _SPRA_POS		0x7028c
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 4a4c6dd..e33124c 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -405,6 +405,13 @@ struct intel_plane {
>  	unsigned int crtc_w, crtc_h;
>  	uint32_t src_x, src_y;
>  	uint32_t src_w, src_h;
> +	union {
> +		uint64_t value;
> +		struct {
> +			unsigned int type;
> +			unsigned int factor;
> +		} details;
> +	} blend_param;
>  
>  	/* Since we need to change the watermarks before/after
>  	 * enabling/disabling the planes, we need to store the parameters here
> diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
> index 9436f18..4c3d2a2 100644
> --- a/drivers/gpu/drm/i915/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/intel_sprite.c
> @@ -51,11 +51,15 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
>  	int pipe = intel_plane->pipe;
>  	int plane = intel_plane->plane;
>  	u32 sprctl;
> +	u32 sprconstalpha;
> +	unsigned int blend_type, blend_factor;
>  	unsigned long sprsurf_offset, linear_offset;
>  	int pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
>  
>  	sprctl = I915_READ(SPCNTR(pipe, plane));
>  
> +	sprconstalpha = SPCONSTALPHA(pipe, plane);
> +
>  	/* Mask out pixel format bits in case we change it */
>  	sprctl &= ~SP_PIXFORMAT_MASK;
>  	sprctl &= ~SP_YUV_BYTE_ORDER_MASK;
> @@ -104,6 +108,23 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc *crtc,
>  		break;
>  	}
>  
> +	/* Handle plane alpha and color blending properties */
> +	blend_type = intel_plane->blend_param.details.type;
> +	blend_factor = intel_plane->blend_param.details.factor;
> +
> +	switch (blend_type) {
> +	case DRM_BLEND_NONE:
> +		I915_WRITE(sprconstalpha, ~SPRITE_CONSTANT_ALPHA_ENABLE);
> +		break;
> +	case DRM_BLEND_CONSTANT_ALPHA:
> +		I915_WRITE(sprconstalpha, (blend_factor & SPRITE_CONSTANT_ALPHA_MASK) |
> +						SPRITE_CONSTANT_ALPHA_ENABLE);
> +		break;
> +	default:
> +		DRM_DEBUG_DRIVER("%x Blending operation not supported", intel_plane->blend_param.details.type);
> +		break;
> +	}
> +
>  	/*
>  	 * Enable gamma to match primary/cursor plane behaviour.
>  	 * FIXME should be user controllable via propertiesa.
> @@ -1011,6 +1032,26 @@ out_unlock:
>  	return ret;
>  }
>  
> +static int intel_plane_set_property(struct drm_plane *plane,
> +				    struct drm_property *prop,
> +				    uint64_t val)
> +{
> +	struct drm_i915_private *dev_priv = plane->dev->dev_private;
> +	struct intel_plane *intel_plane = to_intel_plane(plane);
> +	uint64_t old_val;
> +	int ret = -ENOENT;

This should be -EINVAL. This existing API is to return -EINVAL, see:

static int drm_mode_plane_set_obj_prop(struct drm_mode_object *obj,
                                      struct drm_property *property,
                                      uint64_t value)
{
        int ret = -EINVAL;
...

Let's no introduce something different.

> +
> +	if (prop == dev_priv->blend_property) {
> +		old_val = intel_plane->blend_param.value;
> +		intel_plane->blend_param.value = val;
> +		ret = intel_plane_restore(plane);
> +		if (ret)
> +			intel_plane->blend_param.value = old_val;
> +	}
> +
> +	return ret;
> +}
> +
>  int intel_plane_restore(struct drm_plane *plane)
>  {
>  	struct intel_plane *intel_plane = to_intel_plane(plane);
> @@ -1037,6 +1078,7 @@ static const struct drm_plane_funcs intel_plane_funcs = {
>  	.update_plane = intel_update_plane,
>  	.disable_plane = intel_disable_plane,
>  	.destroy = intel_destroy_plane,
> +	.set_property = intel_plane_set_property,
>  };
>  
>  static uint32_t ilk_plane_formats[] = {
> @@ -1073,6 +1115,7 @@ static uint32_t vlv_plane_formats[] = {
>  int
>  intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
>  {
> +	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct intel_plane *intel_plane;
>  	unsigned long possible_crtcs;
>  	const uint32_t *plane_formats;
> @@ -1141,13 +1184,29 @@ intel_plane_init(struct drm_device *dev, enum pipe pipe, int plane)
>  
>  	intel_plane->pipe = pipe;
>  	intel_plane->plane = plane;
> +	/* Initialize drm properties for plane */
> +	intel_plane->blend_param.details.type = BIT(DRM_BLEND_NONE);
> +	intel_plane->blend_param.details.factor = 0;
> +
>  	possible_crtcs = (1 << pipe);
>  	ret = drm_plane_init(dev, &intel_plane->base, possible_crtcs,
>  			     &intel_plane_funcs,
>  			     plane_formats, num_plane_formats,
>  			     false);
> -	if (ret)
> +	if (ret) {
>  		kfree(intel_plane);
> +		goto out;
> +	}
> +
> +	if (!dev_priv->blend_property)
> +		dev_priv->blend_property = drm_mode_create_blend_property(dev,
> +							BIT(DRM_BLEND_NONE) |
> +							BIT(DRM_BLEND_CONSTANT_ALPHA));
>  
> +	if (dev_priv->blend_property)
> +		drm_object_attach_property(&intel_plane->base.base,
> +				dev_priv->blend_property,
> +				intel_plane->blend_param.value);
> +out:
>  	return ret;
>  }
> -- 
> 1.8.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx