From: Daniel Vetter <daniel@ffwll.ch>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: Akash Goel <akash.goel@intel.com>,
Daniel Vetter <daniel.vetter@ffwll.ch>,
sourab.gupta@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v3 4/6] drm/i915: Remove the enabling of VS_TIMER_DISPATCH bit in MI MODE reg
Date: Tue, 25 Mar 2014 16:41:19 +0100 [thread overview]
Message-ID: <20140325154119.GH26878@phenom.ffwll.local> (raw)
In-Reply-To: <20140325131110.GN21652@intel.com>
On Tue, Mar 25, 2014 at 03:11:10PM +0200, Ville Syrjälä wrote:
> On Tue, Mar 25, 2014 at 06:01:50PM +0530, sourab.gupta@intel.com wrote:
> > From: Akash Goel <akash.goel@intel.com>
> >
> > This patch Removes the VS_TIMER_DISPATCH bit enable in MI MODE reg for
> > platforms > Gen6.
> > VS_TIMER_DISPATCH bit enable was earlier required as a part of
> > WA 'WaTimedSingleVertexDispatch', which is now applicable only to
> > platforms < Gen7.
> >
> > v2: Enhancing the scope of the patch to full Gen7 (Chris)
> >
> > v3: Modifying the WA condition to the cover the applicable platforms,
> > and adding the WA name in comments. (Ville)
> >
> > Signed-off-by: Akash Goel <akash.goel@intel.com>
> > Signed-off-by: Sourab Gupta <sourab.gupta@intel.com>
> > Tested-by: Chris Wilson <chris@chris-wilson.co.uk> # ivb, hsw -Chris
>
> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
next prev parent reply other threads:[~2014-03-25 15:41 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-24 17:30 [PATCH 0/6] Rendering Specific HW Workarounds for VLV sourab.gupta
2014-03-24 17:30 ` [PATCH v4 1/6] drm/i915/vlv: Added a rendering specific Hw WA 'WaTlbInvalidateStoreDataBefore' sourab.gupta
2014-03-24 17:30 ` [PATCH v4 2/6] drm/i915/vlv: Added a rendering specific Hw WA 'WaSendDummy3dPrimitveAfterSetContext' sourab.gupta
2014-04-08 4:41 ` Gupta, Sourab
2014-04-14 9:45 ` [PATCH v5 " sourab.gupta
2014-05-28 9:57 ` Gupta, Sourab
2014-06-05 5:44 ` Gupta, Sourab
2014-03-24 17:30 ` [PATCH v2 3/6] drm/i915: Enabling the TLB invalidate bit in GFX Mode register sourab.gupta
2014-04-01 5:01 ` Gupta, Sourab
2014-04-02 11:34 ` Ville Syrjälä
2014-04-02 11:55 ` Daniel Vetter
2014-03-24 17:30 ` [PATCH 4/6] drm/i915/vlv: Remove the enabling of VS_TIMER_DISPATCH bit in MI MODE reg sourab.gupta
2014-03-24 17:47 ` Chris Wilson
2014-03-24 17:55 ` Gupta, Sourab
2014-03-24 18:01 ` Chris Wilson
2014-03-24 18:28 ` [PATCH v2 " sourab.gupta
2014-03-25 11:33 ` Ville Syrjälä
2014-03-25 12:31 ` [PATCH v3 4/6] drm/i915: " sourab.gupta
2014-03-25 13:11 ` Ville Syrjälä
2014-03-25 15:41 ` Daniel Vetter [this message]
2014-03-24 17:30 ` [PATCH v2 5/6] drm/i915/vlv:Implement the WA 'WaDisable_RenderCache_OperationalFlush' sourab.gupta
2014-04-01 10:51 ` Ville Syrjälä
2014-04-03 4:42 ` [PATCH v3 " sourab.gupta
2014-04-04 11:17 ` Ville Syrjälä
2014-04-04 11:44 ` [PATCH v4 " sourab.gupta
2014-04-04 15:24 ` Chris Wilson
2014-04-04 15:35 ` Ville Syrjälä
2014-04-04 15:59 ` Chris Wilson
2014-04-04 15:59 ` Daniel Vetter
2014-03-24 17:30 ` [PATCH v2 6/6] drm/i915/vlv: Modifying WA 'WaDisableL3Bank2xClockGate for vlv sourab.gupta
2014-03-24 17:56 ` Damien Lespiau
2014-03-25 6:52 ` Gupta, Sourab
2014-04-01 5:22 ` Gupta, Sourab
2014-04-14 10:22 ` Gupta, Sourab
2014-05-26 10:33 ` Gupta, Sourab
2014-05-27 14:27 ` Damien Lespiau
2014-05-27 16:54 ` Daniel Vetter
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