From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH v3 4/6] drm/i915: Remove the enabling of
 VS_TIMER_DISPATCH bit in MI MODE reg
Date: Tue, 25 Mar 2014 16:41:19 +0100
Message-ID: <20140325154119.GH26878@phenom.ffwll.local>
References: <20140325113351.GM21652@intel.com>
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To: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Cc: Akash Goel <akash.goel@intel.com>, Daniel Vetter <daniel.vetter@ffwll.ch>, sourab.gupta@intel.com, intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

On Tue, Mar 25, 2014 at 03:11:10PM +0200, Ville Syrj=E4l=E4 wrote:
> On Tue, Mar 25, 2014 at 06:01:50PM +0530, sourab.gupta@intel.com wrote:
> > From: Akash Goel <akash.goel@intel.com>
> > =

> > This patch Removes the VS_TIMER_DISPATCH bit enable in MI MODE reg for
> > platforms > Gen6.
> > VS_TIMER_DISPATCH bit enable was earlier required as a part of
> > WA 'WaTimedSingleVertexDispatch', which is now applicable only to
> > platforms < Gen7.
> > =

> > v2: Enhancing the scope of the patch to full Gen7 (Chris)
> > =

> > v3: Modifying the WA condition to the cover the applicable platforms,
> > and adding the WA name in comments. (Ville)
> > =

> > Signed-off-by: Akash Goel <akash.goel@intel.com>
> > Signed-off-by: Sourab Gupta <sourab.gupta@intel.com>
> > Tested-by: Chris Wilson <chris@chris-wilson.co.uk> # ivb, hsw -Chris
> =

> Reviewed-by: Ville Syrj=E4l=E4 <ville.syrjala@linux.intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- =

Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch