From mboxrd@z Thu Jan  1 00:00:00 1970
From: Daniel Vetter <daniel@ffwll.ch>
Subject: Re: [PATCH 41/49] drm/i915/bdw: LR context switch
 interrupts
Date: Wed, 2 Apr 2014 13:49:38 +0200
Message-ID: <20140402114938.GS7225@phenom.ffwll.local>
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To: Damien Lespiau <damien.lespiau@intel.com>
Cc: Thomas Daniel <thomas.daniel@intel.com>, intel-gfx@lists.freedesktop.org
List-Id: intel-gfx@lists.freedesktop.org

On Wed, Apr 02, 2014 at 12:42:11PM +0100, Damien Lespiau wrote:
> On Thu, Mar 27, 2014 at 06:00:10PM +0000, oscar.mateo@intel.com wrote:
> > @@ -543,6 +545,9 @@ static int init_ring_common_lrc(struct intel_engine *ring)
> >  	ringbuf->space = ringbuf->size;
> >  	ringbuf->last_retired_head = -1;
> >  
> > +	I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask));
> > +	I915_WRITE(RING_HWSTAM(ring->mmio_base), ~(ring->irq_enable_mask | ring->irq_keep_mask));
> > +
> >  	return 0;
> >  }
> >  
> 
> Two little things:
> 
>   - I don't see any place where we look at the interrupt reporting in
>     the HWS page, so we could just initialize HWSTAM to 0xffffffff

It's an old w/a to make interrupt signalling a little bit more coherent.
No idea whether we still need it since we don't really have a good
testcase for interrupts ... I guess we could give it a shot with a patch
and a big commit message citing all the history.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch