From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: Invariably invalidate before ctx switch Date: Thu, 3 Apr 2014 13:21:38 +0300 Message-ID: <20140403102138.GT21652@intel.com> References: <1396503023-3114-1-git-send-email-benjamin.widawsky@intel.com> <20140403070535.GJ5602@nuc-i3427.alporthouse.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 8798D6E8CB for ; Thu, 3 Apr 2014 03:21:43 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20140403070535.GJ5602@nuc-i3427.alporthouse.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Chris Wilson , Ben Widawsky , Intel GFX List-Id: intel-gfx@lists.freedesktop.org On Thu, Apr 03, 2014 at 08:05:35AM +0100, Chris Wilson wrote: > On Wed, Apr 02, 2014 at 10:30:23PM -0700, Ben Widawsky wrote: > > We have been setting the bit which was originally BIOS dependent since: > > commit f05bb0c7b624252a5e768287e340e8e45df96e42 > > Author: Chris Wilson > > Date: Sun Jan 20 16:33:32 2013 +0000 > > = > > drm/i915: GFX_MODE Flush TLB Invalidate Mode must be '1' for scanli= ne waits > > = > > Therefore, we do not need to try to figure it out dynamically and we can > > just always invalidate the TLBs. > > = > > It's a partial revert of: > > commit 12b0286f49947a6cdc9285032d918466a8c3f5f9 > > Author: Ben Widawsky > > Date: Mon Jun 4 14:42:50 2012 -0700 > > = > > drm/i915: possibly invalidate TLB before context switch > > = > > The original commit attempted to only invalidate when necessary > > (very much a relic from the old days). Now, we can just always invalida= te. > > = > > I guess the old TODO still exists. Since we seem to have abandoned ILK > > contexts however, there isn't much point in even remembering. > > = > > Cc: Chris Wilson > > Signed-off-by: Ben Widawsky > = > Seems reasonable, except in most cases (execbuffer) there will be > a following cache-invalidate as part of the move-to-gpu. Except we still move_to_gpu() before the context switch. My fbc related patch to change that order never got merged. > = > Reviewed-by: Chris Wilson > = > ILK ctx, never forget. > -Chris > = > -- = > Chris Wilson, Intel Open Source Technology Centre > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC