From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 1/4] drm/i915/vlv: write the port field in the per-pipe DIP control reg Date: Fri, 4 Apr 2014 22:25:50 +0300 Message-ID: <20140404192550.GD4481@intel.com> References: <1396458534-23108-1-git-send-email-jbarnes@virtuousgeek.org> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by gabe.freedesktop.org (Postfix) with ESMTP id 5E8836E0CC for ; Fri, 4 Apr 2014 12:25:54 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1396458534-23108-1-git-send-email-jbarnes@virtuousgeek.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jesse Barnes Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Wed, Apr 02, 2014 at 10:08:51AM -0700, Jesse Barnes wrote: > In case we end up bouncing these around between ports. > = > Signed-off-by: Jesse Barnes Whoops. Almost missed this one. I must have an spam filter for cover letters in my brain or something, Reviewed-by: Ville Syrj=E4l=E4 > --- > drivers/gpu/drm/i915/intel_hdmi.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > = > diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/int= el_hdmi.c > index b0413e1..ee892a4 100644 > --- a/drivers/gpu/drm/i915/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/intel_hdmi.c > @@ -557,10 +557,12 @@ static void vlv_set_infoframes(struct drm_encoder *= encoder, > struct drm_display_mode *adjusted_mode) > { > struct drm_i915_private *dev_priv =3D encoder->dev->dev_private; > + struct intel_digital_port *intel_dig_port =3D enc_to_dig_port(encoder); > struct intel_crtc *intel_crtc =3D to_intel_crtc(encoder->crtc); > struct intel_hdmi *intel_hdmi =3D enc_to_intel_hdmi(encoder); > u32 reg =3D VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); > u32 val =3D I915_READ(reg); > + u32 port =3D VIDEO_DIP_PORT(intel_dig_port->port); > = > assert_hdmi_port_disabled(intel_hdmi); > = > @@ -576,6 +578,16 @@ static void vlv_set_infoframes(struct drm_encoder *e= ncoder, > return; > } > = > + if (port !=3D (val & VIDEO_DIP_PORT_MASK)) { > + if (val & VIDEO_DIP_ENABLE) { > + val &=3D ~VIDEO_DIP_ENABLE; > + I915_WRITE(reg, val); > + POSTING_READ(reg); > + } > + val &=3D ~VIDEO_DIP_PORT_MASK; > + val |=3D port; > + } > + > val |=3D VIDEO_DIP_ENABLE; > val &=3D ~(VIDEO_DIP_ENABLE_VENDOR | VIDEO_DIP_ENABLE_GAMUT | > VIDEO_DIP_ENABLE_GCP); > -- = > 1.7.9.5 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC