From mboxrd@z Thu Jan 1 00:00:00 1970 From: Damien Lespiau Subject: Re: [PATCH 3/3] drm/i915/bdw: Use the GEN8 SRM when qeueing a flip Date: Mon, 7 Apr 2014 23:20:14 +0100 Message-ID: <20140407222014.GL6407@strange.amr.corp.intel.com> References: <1396898674-22510-1-git-send-email-damien.lespiau@intel.com> <1396898674-22510-4-git-send-email-damien.lespiau@intel.com> <20140407205917.GD18726@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by gabe.freedesktop.org (Postfix) with ESMTP id 4742F6E73D for ; Mon, 7 Apr 2014 15:20:17 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20140407205917.GD18726@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Ben Widawsky Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Mon, Apr 07, 2014 at 01:59:17PM -0700, Ben Widawsky wrote: > Cool. This explains the bad DERRMR values I was seeing in in error > states. I'm honestly didn't check if we actually need an SRM for BDW > still, but I'll assume you did check. Just checked, the LRI command still mentions that we need the SRM after writes to the display engine. > I also think it's worth to make a intel_gen8_queue_flip, but since I > don't touch this code much, I'll leave it to you to decide. Don't have a strong opinion at all, so I'll leave it at that for now. -- Damien