From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH] drm/i915: Rename GEN8_PIPE_FLIP_DONE to PRIMARY_FLIP_DONE Date: Tue, 8 Apr 2014 13:31:34 +0300 Message-ID: <20140408103134.GF4481@intel.com> References: <1396916564-31557-1-git-send-email-damien.lespiau@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id B2C786E984 for ; Tue, 8 Apr 2014 03:31:59 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1396916564-31557-1-git-send-email-damien.lespiau@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Damien Lespiau Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Tue, Apr 08, 2014 at 01:22:44AM +0100, Damien Lespiau wrote: > It is now clear that this interrupt is for the primary plane and not > something global to the pipe. It also matches what the spec calls it. > = > Signed-off-by: Damien Lespiau Reviewed-by: Ville Syrj=E4l=E4 > --- > drivers/gpu/drm/i915/i915_irq.c | 4 ++-- > drivers/gpu/drm/i915/i915_reg.h | 2 +- > 2 files changed, 3 insertions(+), 3 deletions(-) > = > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_= irq.c > index 4ca0344..7a4d3ae 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -2060,7 +2060,7 @@ static irqreturn_t gen8_irq_handler(int irq, void *= arg) > if (pipe_iir & GEN8_PIPE_VBLANK) > drm_handle_vblank(dev, pipe); > = > - if (pipe_iir & GEN8_PIPE_FLIP_DONE) { > + if (pipe_iir & GEN8_PIPE_PRIMARY_FLIP_DONE) { > intel_prepare_page_flip(dev, pipe); > intel_finish_page_flip_plane(dev, pipe); > } > @@ -3250,7 +3250,7 @@ static void gen8_gt_irq_postinstall(struct drm_i915= _private *dev_priv) > static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) > { > struct drm_device *dev =3D dev_priv->dev; > - uint32_t de_pipe_masked =3D GEN8_PIPE_FLIP_DONE | > + uint32_t de_pipe_masked =3D GEN8_PIPE_PRIMARY_FLIP_DONE | > GEN8_PIPE_CDCLK_CRC_DONE | > GEN8_DE_PIPE_IRQ_FAULT_ERRORS; > uint32_t de_pipe_enables =3D de_pipe_masked | GEN8_PIPE_VBLANK | > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_= reg.h > index bc5ec33..f0c1e56 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -4209,7 +4209,7 @@ enum punit_power_well { > #define GEN8_PIPE_SPRITE_FAULT (1 << 9) > #define GEN8_PIPE_PRIMARY_FAULT (1 << 8) > #define GEN8_PIPE_SPRITE_FLIP_DONE (1 << 5) > -#define GEN8_PIPE_FLIP_DONE (1 << 4) > +#define GEN8_PIPE_PRIMARY_FLIP_DONE (1 << 4) > #define GEN8_PIPE_SCAN_LINE_EVENT (1 << 2) > #define GEN8_PIPE_VSYNC (1 << 1) > #define GEN8_PIPE_VBLANK (1 << 0) > -- = > 1.8.3.1 > = > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- = Ville Syrj=E4l=E4 Intel OTC