From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Vetter Subject: Re: [PATCH 0/7] Updated MIPI sequence for BYT Date: Wed, 9 Apr 2014 16:51:56 +0200 Message-ID: <20140409145156.GG9262@phenom.ffwll.local> References: <1397032176-11988-1-git-send-email-shobhit.kumar@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail-ee0-f48.google.com (mail-ee0-f48.google.com [74.125.83.48]) by gabe.freedesktop.org (Postfix) with ESMTP id A19876EB88 for ; Wed, 9 Apr 2014 07:51:59 -0700 (PDT) Received: by mail-ee0-f48.google.com with SMTP id b57so1967087eek.7 for ; Wed, 09 Apr 2014 07:51:58 -0700 (PDT) Content-Disposition: inline In-Reply-To: <1397032176-11988-1-git-send-email-shobhit.kumar@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Shobhit Kumar Cc: Jani Nikula , Daniel Vetter , intel-gfx List-Id: intel-gfx@lists.freedesktop.org On Wed, Apr 09, 2014 at 01:59:29PM +0530, Shobhit Kumar wrote: > Hi, > The changes in DSI sequence are as suggested by HW and SV teams. Notable > difference apart form few WAs is that for MIPI it is suggetsed that the > PORT is enabled before PIPE and PLANE. The patch makes these changes. > So few sequence changes, few workarounds and few new feature support like > Clockstop. > > A generic panel driver to enable MIPI is planned in next patchset > > Known issue - > Today the upstream kernel does not have PMIC driver amd these patches works if > UEFI BIOS enables MIPI and reuse BKL_EN, PANEL_EN from there, but during > suspend/resume things will still fail. Thanks a lot for the patches&review, looking forward to the next round. Hopefully that one will fix our mipi/dsi code to Just Work (tm) so that we can close the asus 100t bug on kernel.org: https://bugzilla.kernel.org/show_bug.cgi?id=68451 Cheers, Daniel > > Regards > Shobhit > > Shobhit Kumar (7): > drm/i915: Program Rcomp and band gap reset everytime we resume from power gate > drm/i915: Enable MIPI port before the plane and pipe enable > drm/i915: Disable DPOunit clock gating > drm/i915: Parameterize the Clockstop and escape_clk_div > drm/i915: Panel commands can be sent only when clock is in LP11 > drm/i915: Send DPI command explicitely in LP mode > drm/i915: Enable RANDOM resolution support for MIPI panels > > drivers/gpu/drm/i915/intel_dsi.c | 125 +++++++++++++++++++++++++++-------- > drivers/gpu/drm/i915/intel_dsi.h | 4 +- > drivers/gpu/drm/i915/intel_dsi_cmd.c | 4 +- > drivers/gpu/drm/i915/intel_dsi_cmd.h | 5 +- > 4 files changed, 108 insertions(+), 30 deletions(-) > > -- > 1.8.3.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch