From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 00/71] drm/i915/chv: Add Cherryview support Date: Wed, 9 Apr 2014 18:05:27 +0300 Message-ID: <20140409150527.GQ18465@intel.com> References: <1397039349-10639-1-git-send-email-ville.syrjala@linux.intel.com> <20140409132516.GN18465@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id D21036EB92 for ; Wed, 9 Apr 2014 08:07:18 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: "S, Deepak" Cc: "intel-gfx@lists.freedesktop.org" List-Id: intel-gfx@lists.freedesktop.org On Wed, Apr 09, 2014 at 02:30:52PM +0000, S, Deepak wrote: > Hi Ville, > = > I am Ok with cleaning up and pushing the Code. Can you please tell me wh= en we need to start pushing the code and branch to use (drm-intel-next)? Well you can consider it pushed now that it's in the open. The patches just need a bit of extra polish I think. Well, unless you're planning a full blown rewrite of the code ;) I guess you need to take into consideration whatever bdw rc6/rps patches are still in flight, but since you've been doing some review there I think you have a better idea than I do how things are progressing. I always work on top of nightly, so I guess that's a good choice :) > = > Thanks > Deepak > = > -----Original Message----- > From: Ville Syrj=E4l=E4 [mailto:ville.syrjala@linux.intel.com] = > Sent: Wednesday, April 9, 2014 6:55 PM > To: intel-gfx@lists.freedesktop.org > Cc: S, Deepak; Deak, Imre > Subject: Re: [PATCH 00/71] drm/i915/chv: Add Cherryview support > = > As you may have noticed some of this stuf may need a bit of work still to= fit in better with the more recent upstream changes. > = > So I think we need a few people to do some work here to the the patches i= nto a really good shape. So some division of labor would in order. I'm prop= osing the following: > rc6/turbo -> Deepak as he's written the code anyway interrupts -> Imre si= nce he worked on the VLV interrupts recently > = > The rest of the patches should be fairly OK I think. So for the rest we p= robably just need reviews mostly, and maybe we want to squash some of the m= ore trivial patches. > = > -- > Ville Syrj=E4l=E4 > Intel OTC -- = Ville Syrj=E4l=E4 Intel OTC