Re: [PATCH 12/71] drm/i915/chv: Initial clock gating support for Cherryview

Jani Nikula
2014-05-08T14:34:55Z

On Wed, 09 Apr 2014, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> CHV clock gating isn't identical to VLV, so add a new function
> for it. This is only a start, and further changes are needed as
> the details become available.
>

I'm a bit on thin ice here, but with the "Reviewer's statement of
oversight" in mind,

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 13 +++++++++++++
> 1 file changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 21cfbc7..0889af7 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5122,6 +5122,15 @@ static void valleyview_init_clock_gating(struct drm_device *dev)
> I915_WRITE(VLV_GUNIT_CLOCK_GATE, GCFG_DIS);
> }
>
> +static void cherryview_init_clock_gating(struct drm_device *dev)
> +{
> + struct drm_i915_private *dev_priv = dev->dev_private;
> +
> + I915_WRITE(DSPCLK_GATE_D, VRHUNIT_CLOCK_GATE_DISABLE);
> +
> + I915_WRITE(MI_ARB_VLV, MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE);
> +}
> +
> static void g4x_init_clock_gating(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> @@ -6015,6 +6024,10 @@ void intel_init_pm(struct drm_device *dev)
> dev_priv->display.init_clock_gating = haswell_init_clock_gating;
> else if (INTEL_INFO(dev)->gen == 8)
> dev_priv->display.init_clock_gating = gen8_init_clock_gating;
> + } else if (IS_CHERRYVIEW(dev)) {
> + dev_priv->display.update_wm = valleyview_update_wm;
> + dev_priv->display.init_clock_gating =
> + cherryview_init_clock_gating;
> } else if (IS_VALLEYVIEW(dev)) {
> dev_priv->display.update_wm = valleyview_update_wm;
> dev_priv->display.init_clock_gating =
> --
> 1.8.3.2
>
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--
Jani Nikula, Intel Open Source Technology Center