public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Daniel Vetter <daniel@ffwll.ch>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 10/15] drm/i915: disable runtime PM until delayed RPS/RC6 enabling completes
Date: Wed, 9 Apr 2014 18:38:30 +0200	[thread overview]
Message-ID: <20140409163830.GU9262@phenom.ffwll.local> (raw)
In-Reply-To: <1397054287.2552.15.camel@ideak-mobl>

On Wed, Apr 09, 2014 at 05:38:07PM +0300, Imre Deak wrote:
> On Wed, 2014-04-09 at 16:19 +0200, Daniel Vetter wrote:
> > On Tue, Apr 08, 2014 at 07:57:51PM +0300, Imre Deak wrote:
> > > At least on some platforms we depend on RC6 being enabled for RPM, so
> > > disable RPM until the delayed RC6 enabling completes. For simplicity
> > > don't differentiate between platforms, those that don't have this
> > > dependency will enable RC6 only rarely during driver init and system
> > > resume.
> > > 
> > > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/i915_drv.c  |  5 ++++-
> > >  drivers/gpu/drm/i915/intel_drv.h |  1 +
> > >  drivers/gpu/drm/i915/intel_pm.c  | 17 +++++++++++++++++
> > >  3 files changed, 22 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > > index 8dee34c..0948228 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.c
> > > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > > @@ -755,7 +755,7 @@ int i915_reset(struct drm_device *dev)
> > >  		 * of re-init after reset. */
> > >  		if (INTEL_INFO(dev)->gen > 5) {
> > >  			mutex_lock(&dev->struct_mutex);
> > > -			intel_enable_gt_powersave(dev);
> > > +			intel_reset_gt_powersave(dev);
> > >  			mutex_unlock(&dev->struct_mutex);
> > >  		}
> > >  
> > > @@ -958,6 +958,9 @@ static int intel_runtime_suspend(struct device *device)
> > >  	struct drm_device *dev = pci_get_drvdata(pdev);
> > >  	struct drm_i915_private *dev_priv = dev->dev_private;
> > >  
> > > +	if (WARN_ON_ONCE(!dev_priv->rps.enabled))
> > > +		return -ENODEV;
> > > +
> > >  	WARN_ON(!HAS_RUNTIME_PM(dev));
> > >  	assert_force_wake_inactive(dev_priv);
> > >  
> > > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > > index 42762b7..7f4e873 100644
> > > --- a/drivers/gpu/drm/i915/intel_drv.h
> > > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > > @@ -901,6 +901,7 @@ void intel_init_gt_powersave(struct drm_device *dev);
> > >  void intel_cleanup_gt_powersave(struct drm_device *dev);
> > >  void intel_enable_gt_powersave(struct drm_device *dev);
> > >  void intel_disable_gt_powersave(struct drm_device *dev);
> > > +void intel_reset_gt_powersave(struct drm_device *dev);
> > >  void ironlake_teardown_rc6(struct drm_device *dev);
> > >  void gen6_update_ring_freq(struct drm_device *dev);
> > >  void gen6_rps_idle(struct drm_i915_private *dev_priv);
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > index 5728238..c082936 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -4519,6 +4519,8 @@ static void intel_gen6_powersave_work(struct work_struct *work)
> > >  	}
> > >  	dev_priv->rps.enabled = true;
> > >  	mutex_unlock(&dev_priv->rps.hw_lock);
> > > +
> > > +	intel_runtime_pm_put(dev_priv);
> > >  }
> > >  
> > >  void intel_enable_gt_powersave(struct drm_device *dev)
> > > @@ -4534,12 +4536,27 @@ void intel_enable_gt_powersave(struct drm_device *dev)
> > >  		 * PCU communication is slow and this doesn't need to be
> > >  		 * done at any specific time, so do this out of our fast path
> > >  		 * to make resume and init faster.
> > > +		 *
> > > +		 * On platforms like Valleyview we depend on the HW RC6 power
> > > +		 * context save/restore mechanism when entering D3 through
> > > +		 * runtime PM suspend. So disable RPM until RPS/RC6 is
> > > +		 * properly setup.
> > >  		 */
> > 
> > I'm pretty sure that depency also exists on other platforms since I did
> > wonder quite a bit how the current runtime pm stuff resurrects the render
> > state ;-)
> 
> Yes, that's possible, I haven't checked this for other platforms, but
> they should be covered too after this patch. Well, we'll still need to
> re-enable RPS for those during RPM resume. Perhaps that can be done in
> the context of the refactoring work you asked for 14/15.
> 
> > Imo the right approach here is to grab a runtime pm reference in the
> > function that launches the async work and drop it again when that work has
> > completed.
> 
> Do you mean something different than what this patch does? I get here
> the RPM reference when rps.delayed_resume_work is scheduled and drop it
> when the work is completed. Note that after we enable RPM for VLV we
> have to do this same sequence when re-enabling RPS from runtime resume,
> hence the _noresume version.

Ah, just failed to read the patch, somehow was getting confused ... Please
extend this comment to explain why we need the _noresume variant, that
sounds like a really crucial detail.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2014-04-09 16:38 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-08 16:57 [PATCH 00/15] vlv: add support for RPM Imre Deak
2014-04-08 16:57 ` [PATCH 01/15] drm/i915: vlv: clean up GTLC wake control/status register macros Imre Deak
2014-04-16 21:08   ` Rodrigo Vivi
2014-04-16 21:20     ` Imre Deak
2014-04-08 16:57 ` [PATCH 02/15] drm/i915: vlv: clear master interrupt flag when disabling interrupts Imre Deak
2014-04-08 16:57 ` [PATCH 03/15] drm/i915: vlv: add RC6 residency counters Imre Deak
2014-04-08 16:57 ` [PATCH 04/15] drm/i915: fix rc6 status debug print Imre Deak
2014-04-08 16:57 ` [PATCH 05/15] drm/i915: take init power domain for sysfs/debugfs entries where needed Imre Deak
2014-04-08 19:34   ` [PATCH v2 5/15] " Imre Deak
2014-04-09 14:15     ` Daniel Vetter
2014-04-09 14:21       ` Paulo Zanoni
2014-04-09 14:21       ` Imre Deak
2014-04-09 16:06         ` Ville Syrjälä
2014-04-09 16:30           ` Imre Deak
2014-04-09 16:35           ` Daniel Vetter
2014-04-08 16:57 ` [PATCH 06/15] drm/i915: get init power domain for gpu error state capture Imre Deak
2014-04-09 14:17   ` Daniel Vetter
2014-04-08 16:57 ` [PATCH 07/15] drm/i915: vlv: check port power domain instead of only D0 for eDP VDD on Imre Deak
2014-04-09 14:32   ` Paulo Zanoni
2014-04-09 14:50     ` Imre Deak
2014-04-08 16:57 ` [PATCH 08/15] drm/i915: vlv: setup RPS min/max frequencies once during init time Imre Deak
2014-04-08 16:57 ` [PATCH 09/15] drm/i915: vlv: factor out vlv_force_gfx_clock Imre Deak
2014-04-08 16:57 ` [PATCH 10/15] drm/i915: disable runtime PM until delayed RPS/RC6 enabling completes Imre Deak
2014-04-09 14:19   ` Daniel Vetter
2014-04-09 14:38     ` Imre Deak
2014-04-09 16:38       ` Daniel Vetter [this message]
2014-04-09 16:43         ` Daniel Vetter
2014-04-08 16:57 ` [PATCH 11/15] drm/i915: vlv: disable RPM if RC6 is not enabled Imre Deak
2014-04-09 14:36   ` Paulo Zanoni
2014-04-09 14:59     ` Imre Deak
2014-04-09 16:41       ` Daniel Vetter
2014-04-08 16:57 ` [PATCH 12/15] drm/i915: add various missing GTI/Gunit register definitions Imre Deak
2014-04-08 16:57 ` [PATCH 13/15] drm/i915: vlv: add gunit s0ix save/restore helpers Imre Deak
2014-04-08 16:57 ` [PATCH 14/15] drm/i915: vlv: add runtime PM support Imre Deak
2014-04-09 14:22   ` Daniel Vetter
2014-04-09 15:43     ` Imre Deak
2014-04-09 16:45       ` Daniel Vetter
2014-04-09 16:40   ` Paulo Zanoni
2014-04-09 16:47     ` Imre Deak
2014-04-08 16:57 ` [PATCH 15/15] drm/i915: vlv: enable RPM Imre Deak

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20140409163830.GU9262@phenom.ffwll.local \
    --to=daniel@ffwll.ch \
    --cc=imre.deak@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox