From: Daniel Vetter <daniel@ffwll.ch>
To: bradley.d.volkin@intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH] SQUASH: drm/i915: One more register for mesa
Date: Wed, 9 Apr 2014 21:54:46 +0200 [thread overview]
Message-ID: <20140409195446.GD9262@phenom.ffwll.local> (raw)
In-Reply-To: <1397063574-10928-1-git-send-email-bradley.d.volkin@intel.com>
On Wed, Apr 09, 2014 at 10:12:54AM -0700, bradley.d.volkin@intel.com wrote:
> From: Brad Volkin <bradley.d.volkin@intel.com>
>
> Originally left out because it wasn't used. But it may be needed
> and doesn't pose any risk, so add to the whitelist.
>
> Signed-off-by: Brad Volkin <bradley.d.volkin@intel.com>
Fixup squashed in, thanks.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_cmd_parser.c | 1 +
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
> index 3486ef7..9bac097 100644
> --- a/drivers/gpu/drm/i915/i915_cmd_parser.c
> +++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
> @@ -408,6 +408,7 @@ static const u32 gen7_render_regs[] = {
> REG64(PS_INVOCATION_COUNT),
> REG64(PS_DEPTH_COUNT),
> OACONTROL, /* Only allowed for LRI and SRM. See below. */
> + GEN7_3DPRIM_END_OFFSET,
> GEN7_3DPRIM_START_VERTEX,
> GEN7_3DPRIM_VERTEX_COUNT,
> GEN7_3DPRIM_INSTANCE_COUNT,
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index f49569b..46ea233 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -430,6 +430,7 @@
>
> #define GEN7_SO_PRIM_STORAGE_NEEDED(n) (0x5240 + (n) * 8)
>
> +#define GEN7_3DPRIM_END_OFFSET 0x2420
> #define GEN7_3DPRIM_START_VERTEX 0x2430
> #define GEN7_3DPRIM_VERTEX_COUNT 0x2434
> #define GEN7_3DPRIM_INSTANCE_COUNT 0x2438
> --
> 1.8.3.2
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
prev parent reply other threads:[~2014-04-09 19:54 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-08 21:18 [PATCH] drm/i915: Add more registers to the whitelist for mesa bradley.d.volkin
2014-04-09 13:34 ` Daniel Vetter
2014-04-09 16:22 ` Kenneth Graunke
2014-04-09 16:46 ` Daniel Vetter
2014-04-09 17:12 ` [PATCH] SQUASH: drm/i915: One more register " bradley.d.volkin
2014-04-09 19:54 ` Daniel Vetter [this message]
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