From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Widawsky Subject: Re: [PATCH] BDW swizzling Date: Thu, 10 Apr 2014 23:39:51 -0700 Message-ID: <20140411063950.GF7387@bwidawsk.net> References: <1397147048-23151-1-git-send-email-damien.lespiau@intel.com> <20140410173246.GA7294@intel.com> <20140410175150.GI12932@strange.amr.corp.intel.com> <20140410225035.GA3527@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail.bwidawsk.net (bwidawsk.net [166.78.191.112]) by gabe.freedesktop.org (Postfix) with ESMTP id E46E36ECEF for ; Thu, 10 Apr 2014 23:39:55 -0700 (PDT) Content-Disposition: inline In-Reply-To: <20140410225035.GA3527@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Ben Widawsky Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Thu, Apr 10, 2014 at 03:50:35PM -0700, Ben Widawsky wrote: > On Thu, Apr 10, 2014 at 06:51:50PM +0100, Damien Lespiau wrote: [snip] > > > > Do you know if you have a configuration where we try to swizzle? If yes > > and tests/gem_tiled_pread is passing that would give us a nice bit of > > information. (which of course can be tried by the next person with time > > to do so). > > > > If you get it wrong, it looks really obvious. Swizzling is *supposed* to > be one of those transparent things (I thought). What follows can be > entirely wrong, it's mostly from memory and a brief conversation with > Art. > > There are 3 places that care about swizzling: > 1. The memory/DRAM controller > 2. The displayer interface to memory > 3. The GAM arbiter (generic interface to memory) > > It may or may not be talking about the same type of swizzling (bit) in > all cases. The important thing, and what I have observed, is that the > GAM and DE match on how things are swizzled. Otherwise we render/blit to > a surface and it gets [de]swizzled when it's displayed. I never measured > performance for setting both to 0, instead of 1. > > The part that's confused me has always been why we are supposed to > program it based on #1. The way the DRAM controller decides to lay out > the physical rows/banks etc. shouldn't matter as long as everyone goes > through the same DRAM controller. It should just be transparent linear > RAM. In other words, the comment about how we need to program the > swizzle based on the DRAM controller never quite made sense to me. It's > also possible if you enable one, you shouldn't/should enable another > since compounding swizzling may be self-defeating. Dunno - so maybe your > patch helps, maybe it hurts. > > Art suggested that the swizzling in GAM and DE predate the DRAM > swizzler. My bad. I just read the actual patch's commit message. Seems like you knew all this already. Feel free to ignore me. I'll try to read both before responding, next time. -- Ben Widawsky, Intel Open Source Technology Center