Re: [PATCH 2/2] drm/i915: Move plane enabling to the end of ilk_crtc_enable

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Tue, Apr 15, 2014 at 06:41:23PM +0200, Daniel Vetter wrote:
> Like on hsw/bdw the pipe only starts running once the port/pch
> transcoder combo is all enabled. Before that the vblank wait in the
> primary plane enable function simply times out.
> 
> This is also really nice prep work for atomic modesets since now all
> the plane enabling is at the very end and all tightly grouped
> together, like on hsw+. Which means we can enable it all atomically
> with a nuclear pageflip.
> 
> vlv is still different and the watermark code is also still somewhere
> else, so it's not yet quite perfect. But we're getting there.
> 
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=77297
> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 7 ++++---
>  1 file changed, 4 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index e0310e3018ee..e6555c0dedca 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -3714,9 +3714,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
>  
>  	intel_update_watermarks(crtc);
>  	intel_enable_pipe(intel_crtc);
> -	intel_enable_primary_hw_plane(dev_priv, plane, pipe);
> -	intel_enable_planes(crtc);
> -	intel_crtc_update_cursor(crtc, true);
>  
>  	if (intel_crtc->config.has_pch_encoder)
>  		ironlake_pch_enable(crtc);
> @@ -3742,6 +3739,10 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
>  	 */
>  	intel_wait_for_vblank(dev, intel_crtc->pipe);
>  
> +	intel_enable_primary_hw_plane(dev_priv, plane, pipe);
> +	intel_enable_planes(crtc);
> +	intel_crtc_update_cursor(crtc, true);

This more or less duplicates what's in my watermark series already. Except
you have a few more bugs here. The intel_wait_for_vblank() should be after
the plane enabling since it's a hack to avoid the flip done interrupts
getting mixed up. Also intel_update_fbc() must happen after enabling the
planes. I also made the enable and disable symmetric whereas you didn't.

Dunno maybe you just want to grab the patch from my series?

> +
>  	drm_vblank_on(dev, pipe);
>  }
>  
> -- 
> 1.8.4.rc3
> 
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-- 
Ville Syrjälä
Intel OTC