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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 14/24] drm/i915: Add dev_priv->wm.mutex
Date: Thu, 24 Apr 2014 11:07:15 +0300	[thread overview]
Message-ID: <20140424080715.GO18465@intel.com> (raw)
In-Reply-To: <CA+gsUGSVOpQ+2FBuC=F9swTCc-AON1uFU2DELrpvp2FAKL9_FQ@mail.gmail.com>

On Wed, Apr 23, 2014 at 06:47:04PM -0300, Paulo Zanoni wrote:
> 2014-03-07 13:32 GMT-03:00  <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Add a mutex to protect most of the watermark state. Will be useful when
> > we start to update watermarks asynchronously from plane updates, or
> > when we get finer grained locking for planes.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h  | 11 ++++++++++-
> >  drivers/gpu/drm/i915/intel_drv.h |  5 ++++-
> >  drivers/gpu/drm/i915/intel_pm.c  | 21 +++++++++++++++++++--
> >  3 files changed, 33 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 29da39f..0b19723 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1595,8 +1595,17 @@ typedef struct drm_i915_private {
> >                 /* cursor */
> >                 uint16_t cur_latency[5];
> >
> > -               /* current hardware state */
> > +               /*
> > +                * current hardware state
> > +                * protected by dev_priv->wm.mutex
> > +                */
> >                 struct ilk_wm_values hw;
> > +
> > +               /*
> > +                * protects some dev_priv->wm and intel_crtc->wm
> > +                * state as well as the actual hardware registers
> > +                */
> > +               struct mutex mutex;
> >         } wm;
> >
> >         struct i915_package_c8 pc8;
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > index f022a78..8e32d69 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -384,7 +384,10 @@ struct intel_crtc {
> >
> >         /* per-pipe watermark state */
> >         struct {
> > -               /* watermarks currently being used  */
> > +               /*
> > +                * watermarks currently being used
> > +                * protected by dev_priv->wm.mutex
> > +                */
> >                 struct intel_pipe_wm active;
> >         } wm;
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 3f5c1dc..d8adcb3 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -2692,8 +2692,13 @@ static void ilk_write_wm_values(struct drm_i915_private *dev_priv,
> >  static bool ilk_disable_lp_wm(struct drm_device *dev)
> >  {
> >         struct drm_i915_private *dev_priv = dev->dev_private;
> > +       bool changed;
> >
> > -       return _ilk_disable_lp_wm(dev_priv, WM_DIRTY_LP_ALL);
> > +       mutex_lock(&dev_priv->wm.mutex);
> > +       changed = _ilk_disable_lp_wm(dev_priv, WM_DIRTY_LP_ALL);
> > +       mutex_unlock(&dev_priv->wm.mutex);
> > +
> > +       return changed;
> >  }
> >
> >  static void ilk_program_watermarks(struct drm_device *dev)
> > @@ -2733,6 +2738,7 @@ static void ilk_update_wm(struct drm_crtc *crtc)
> >  {
> >         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> >         struct drm_device *dev = crtc->dev;
> > +       struct drm_i915_private *dev_priv = dev->dev_private;
> >         struct ilk_pipe_wm_parameters params = {};
> >         struct intel_pipe_wm pipe_wm = {};
> >
> > @@ -2740,12 +2746,17 @@ static void ilk_update_wm(struct drm_crtc *crtc)
> >
> >         intel_compute_pipe_wm(crtc, &params, &pipe_wm);
> >
> > +       mutex_lock(&dev_priv->wm.mutex);
> > +
> >         if (!memcmp(&intel_crtc->wm.active, &pipe_wm, sizeof(pipe_wm)))
> > -               return;
> > +               goto unlock;
> >
> >         intel_crtc->wm.active = pipe_wm;
> >
> >         ilk_program_watermarks(dev);
> > +
> > + unlock:
> > +       mutex_unlock(&dev_priv->wm.mutex);
> >  }
> >
> >  static void ilk_update_sprite_wm(struct drm_plane *plane,
> > @@ -2817,10 +2828,14 @@ void ilk_wm_get_hw_state(struct drm_device *dev)
> >         struct drm_i915_private *dev_priv = dev->dev_private;
> >         struct drm_crtc *crtc;
> >
> > +       mutex_lock(&dev_priv->wm.mutex);
> > +
> >         _ilk_wm_get_hw_state(dev, &dev_priv->wm.hw);
> >
> >         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
> >                 _ilk_pipe_wm_hw_to_sw(crtc);
> > +
> > +       mutex_unlock(&dev_priv->wm.mutex);
> >  }
> >
> >  /**
> > @@ -5760,6 +5775,8 @@ void intel_init_pm(struct drm_device *dev)
> >  {
> >         struct drm_i915_private *dev_priv = dev->dev_private;
> >
> > +       mutex_init(&dev_priv->wm.mutex);
> > +
> 
> I think you should probably init this at intel_pm_setup(), which is
> called way earlier. Just to be safe.

If we call some WM function before intel_init_pm() we have a serious
bug. This is where we set up the WM function pointers and extract the
latency values from SSKPD/MLTR.

> 
> With that fixed: Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>.
> 
> >         if (HAS_FBC(dev)) {
> >                 if (INTEL_INFO(dev)->gen >= 7) {
> >                         dev_priv->display.fbc_enabled = ironlake_fbc_enabled;
> > --
> > 1.8.3.2
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Paulo Zanoni

-- 
Ville Syrjälä
Intel OTC

  reply	other threads:[~2014-04-24  8:11 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-07 16:32 [PATCH 00/24] drm/i915: Two part watermark update for ILK+ ville.syrjala
2014-03-07 16:32 ` [PATCH 01/24] drm/i915: Don't read sprite LP2+ registers on ILK/SNB ville.syrjala
2014-04-04 21:35   ` Paulo Zanoni
2014-04-05 15:19     ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 02/24] drm/i915: Add some more tracked state to intel_pipe_wm ville.syrjala
2014-04-07 14:14   ` Paulo Zanoni
2014-04-29 11:18     ` Daniel Vetter
2014-04-29 11:20       ` Daniel Vetter
2014-04-29 12:34         ` Paulo Zanoni
2014-04-29 13:57           ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 03/24] drm/i915: Skip watermark merging for inactive pipes ville.syrjala
2014-04-07 16:23   ` Paulo Zanoni
2014-03-07 16:32 ` [PATCH 04/24] drm/i916: Refactor WM register maximums ville.syrjala
2014-04-07 16:34   ` Paulo Zanoni
2014-04-09 12:22     ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 05/24] drm/i915: Merge LP1+ watermarks in safer way ville.syrjala
2014-04-23 19:13   ` Paulo Zanoni
2014-04-23 20:28     ` Ville Syrjälä
2014-04-28 12:44     ` [PATCH 05.1/24] drm/i915: Make sure computed watermarks never overflow the registers ville.syrjala
2014-04-28 12:44       ` [PATCH v2 05.2/24] drm/i915: Merge LP1+ watermarks in safer way ville.syrjala
2014-04-28 21:35         ` Paulo Zanoni
2014-04-28 21:23       ` [PATCH 05.1/24] drm/i915: Make sure computed watermarks never overflow the registers Paulo Zanoni
2014-03-07 16:32 ` [PATCH 06/24] drm/i915: Disable/enable planes as the first/last thing during modeset on ILK+ ville.syrjala
2014-04-07 19:51   ` Paulo Zanoni
2014-04-15 21:23     ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 07/24] drm/i915: Remove useless checks from primary enable/disable ville.syrjala
2014-03-07 21:29   ` Daniel Vetter
2014-03-10 11:20     ` Ville Syrjälä
2014-03-10 11:57       ` Daniel Vetter
2014-04-07 20:04         ` Paulo Zanoni
2014-04-28 12:53     ` [PATCH v2 " ville.syrjala
2014-04-28 21:39       ` Paulo Zanoni
2014-04-30 11:28       ` Chris Wilson
2014-04-30 11:40         ` Ville Syrjälä
2014-04-30 11:43           ` Chris Wilson
2014-04-30 12:34             ` Daniel Vetter
2014-04-30 14:43             ` [PATCH] drm/i915: Make primary_enabled match the actual hardware state ville.syrjala
2014-04-30 16:01               ` Chris Wilson
2014-03-07 16:32 ` [PATCH 08/24] drm/i915: Shuffle wait_for_vblank out of primary_enable/disable funcs ville.syrjala
2014-04-07 20:27   ` Paulo Zanoni
2014-04-08 18:55     ` Ville Syrjälä
2014-04-29 14:00       ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 09/24] drm/i915: Keep vblank interrupts enabled while enabling/disabling planes ville.syrjala
2014-04-07 21:21   ` Paulo Zanoni
2014-04-08 18:19     ` Ville Syrjälä
2014-04-28 12:58     ` [PATCH v2 " ville.syrjala
2014-04-28 21:42       ` Paulo Zanoni
2014-04-29 14:04         ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 10/24] drm/i915: Leave interrupts enabled while disabling crtcs during suspend ville.syrjala
2014-04-24 13:33   ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 11/24] drm/i915: Check hw vs. sw watermark state after programming ville.syrjala
2014-04-23 21:16   ` Paulo Zanoni
2014-04-29 12:54     ` Ville Syrjälä
2014-03-07 16:32 ` [PATCH 12/24] drm/i915: Refactor ilk_validate_pipe_wm() ville.syrjala
2014-04-23 21:23   ` Paulo Zanoni
2014-03-07 16:32 ` [PATCH 13/24] drm/i915: Refactor ilk_update_wm ville.syrjala
2014-04-23 21:31   ` Paulo Zanoni
2014-03-07 16:32 ` [PATCH 14/24] drm/i915: Add dev_priv->wm.mutex ville.syrjala
2014-04-23 21:47   ` Paulo Zanoni
2014-04-24  8:07     ` Ville Syrjälä [this message]
2014-03-07 16:32 ` [PATCH 15/24] drm/i915: Add vblank based delayed watermark update mechanism ville.syrjala
2014-03-07 16:32 ` [PATCH 16/24] drm/i915: Split watermark programming into pre and post steps ville.syrjala
2014-03-07 16:32 ` [PATCH 17/24] drm/i915: Actually perform the watermark update in two phases ville.syrjala
2014-03-07 16:32 ` [PATCH 18/24] drm/i915: Wait for watermark updates to finish before disabling a pipe ville.syrjala
2014-03-07 16:32 ` [PATCH 19/24] drm/i915: Refactor get_other_active_crtc() ville.syrjala
2014-03-07 16:32 ` [PATCH 20/24] drm/i915: Disable LP1+ watermarks while changing the number of active pipes ville.syrjala
2014-03-07 16:32 ` [PATCH 21/24] drm/i915: Keep track of who disabled LP1+ watermarks ville.syrjala
2014-03-07 16:32 ` [PATCH 22/24] drm/i915: Prefer the 5/6 DDB split when primary is disabled ville.syrjala
2014-03-07 16:32 ` [PATCH 23/24] drm/i915: Add a workaround for sprite only <-> primary only switching ville.syrjala
2014-03-07 21:32   ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 24/24] drm/i915: Don't disable LP1+ watermarks for every frame when scaled ville.syrjala

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