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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Cc: intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [RFC] xf86-video-intel: enable hw-generated binding tables
Date: Thu, 24 Apr 2014 13:17:14 +0300	[thread overview]
Message-ID: <20140424101714.GP18465@intel.com> (raw)
In-Reply-To: <7920834.6vm1cbEC2H@abj-desktop>

On Thu, Apr 24, 2014 at 11:25:15AM +0300, Abdiel Janulgue wrote:
> On Thursday, April 24, 2014 07:06:34 AM Chris Wilson wrote:
> > On Thu, Apr 24, 2014 at 09:08:14AM +0300, Abdiel Janulgue wrote:
> > > Anyway I haven't tried the work-around where we explictly only disable the
> > > BT and RS on the other user-space clients (xorg driver in this case) when
> > > Mesa is using RS instead of forcing the reset of the clients to use RS
> > > format.  I'll try that first and let you know if it works. 
> 
> I hate to break the bad news. Tried this just now - still get hangs :(
> 
> So I guess, all userspace clients* does need to use RS-format if we use this 
> feature. GPGPU workloads seems to be special use-case where the RS hwbinding 
> table format can be disabled. Otherwise, I guess we are stuck with this 
> inflexibility.

The spec also says this:
"When switching between HW and SW binding table generation,
SW must issue a state cache invalidate."

So it does look like they were expecting people to switch between the
two modes.

Do you have any igt test for RS? Maybe add an option into rendercopy to
make use of RS? Then we could write some tests that try to hit this
problem w/o requiring Mesa.

> 
> [1]
> On the other hand, it doesn't seem all that bad though. The RS hw-binding 
> table format are only needed for clients that submit vertex and pixel shader 
> commands. I've identified currently just UXA and SNA that seem to use this 
> besides Mesa. OpenCL is not affected.
> 
> 
> > > If it does, it
> > > might be more efficient to do that in the kernel?
> > 
> > It has to be done in the kernel in order for interoperability with third
> > party clients.
> > -Chris

-- 
Ville Syrjälä
Intel OTC

  parent reply	other threads:[~2014-04-24 10:17 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-22 15:16 [RFC] xf86-video-intel: enable hw-generated binding tables Abdiel Janulgue
2014-04-22 15:16 ` [RFC PATCH 1/2] xf86-video-intel: Add "ResourceStreamer" option Abdiel Janulgue
2014-04-22 15:16 ` [RFC PATCH 2/2] xf86-video-intel: Enable hw-generated binding tables for UXA Abdiel Janulgue
2014-04-22 15:23 ` [RFC] xf86-video-intel: enable hw-generated binding tables Chris Wilson
2014-04-22 17:20   ` Daniel Vetter
2014-04-23 11:21     ` Abdiel Janulgue
2014-04-23 16:52       ` Daniel Vetter
2014-04-23 17:50         ` Ville Syrjälä
2014-04-24  6:08           ` Abdiel Janulgue
2014-04-24  6:06             ` Chris Wilson
2014-04-24  8:25               ` Abdiel Janulgue
2014-04-24 10:04                 ` Daniel Vetter
2014-04-24 10:17                 ` Ville Syrjälä [this message]
2014-04-24 11:22                   ` Abdiel Janulgue
2014-05-02 18:24                   ` Abdiel Janulgue

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