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From: Daniel Vetter <daniel@ffwll.ch>
To: Ben Widawsky <benjamin.widawsky@intel.com>
Cc: Intel GFX <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] intel_error_decode: use 64b gtt_offset
Date: Tue, 29 Apr 2014 10:52:44 +0200	[thread overview]
Message-ID: <20140429085244.GK32404@phenom.ffwll.local> (raw)
In-Reply-To: <1398735950-23760-1-git-send-email-benjamin.widawsky@intel.com>

On Mon, Apr 28, 2014 at 06:45:50PM -0700, Ben Widawsky wrote:
> See the relevant kernel patch for the details. I guess this breaks
> support for older error state, I am not actually sure. Without
> versioning our error state though, I cannot think of a better way.
> Suggestions are welcome.

Just drop the length qualifier and let scanf it the full number?
-Daniel

> 
> Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
> ---
>  tools/intel_error_decode.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/tools/intel_error_decode.c b/tools/intel_error_decode.c
> index 1eeff07..d0028a1 100644
> --- a/tools/intel_error_decode.c
> +++ b/tools/intel_error_decode.c
> @@ -311,17 +311,17 @@ print_fence(unsigned int devid, uint64_t fence)
>  uint32_t head[MAX_RINGS];
>  int head_ndx = 0;
>  int num_rings = 0;
> -static void print_batch(int is_batch, const char *ring_name, uint32_t gtt_offset)
> +static void print_batch(int is_batch, const char *ring_name, uint64_t gtt_offset)
>  {
>  	const char *buffer_type[2] = {  "ringbuffer", "batchbuffer" };
>  	if (is_batch || !num_rings)
> -		printf("%s (%s) at 0x%08x\n", buffer_type[is_batch], ring_name, gtt_offset);
> +		printf("%s (%s) at 0x%016lx\n", buffer_type[is_batch], ring_name, gtt_offset);
>  	else
> -		printf("%s (%s) at 0x%08x; HEAD points to: 0x%08x\n", buffer_type[is_batch], ring_name, gtt_offset, head[head_ndx++ % num_rings] + gtt_offset);
> +		printf("%s (%s) at 0x%016lx; HEAD points to: 0x%016lx\n", buffer_type[is_batch], ring_name, gtt_offset, head[head_ndx++ % num_rings] + gtt_offset);
>  }
>  
>  static void decode(struct drm_intel_decode *ctx, bool is_batch,
> -		   const char *ring_name, uint32_t gtt_offset, uint32_t *data,
> +		   const char *ring_name, uint64_t gtt_offset, uint32_t *data,
>  		   int *count)
>  {
>  	if (!*count)
> @@ -344,7 +344,7 @@ read_data_file(FILE *file)
>  	char *line = NULL;
>  	size_t line_size;
>  	uint32_t offset, value, ring_length = 0;
> -	uint32_t gtt_offset = 0, new_gtt_offset;
> +	uint64_t gtt_offset = 0, new_gtt_offset;
>  	char *ring_name = NULL;
>  	int is_batch = 1;
>  
> @@ -361,7 +361,7 @@ read_data_file(FILE *file)
>  			if (num_rings == -1)
>  				num_rings = head_ndx;
>  
> -			matched = sscanf(dashes, "--- gtt_offset = 0x%08x\n",
> +			matched = sscanf(dashes, "--- gtt_offset = 0x%016lx\n",
>  					&new_gtt_offset);
>  			if (matched == 1) {
>  				decode(decode_ctx, is_batch, ring_name,
> @@ -373,7 +373,7 @@ read_data_file(FILE *file)
>  				continue;
>  			}
>  
> -			matched = sscanf(dashes, "--- ringbuffer = 0x%08x\n",
> +			matched = sscanf(dashes, "--- ringbuffer = 0x%08lx\n",
>  					&new_gtt_offset);
>  			if (matched == 1) {
>  				decode(decode_ctx, is_batch, ring_name,
> -- 
> 1.9.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2014-04-29  8:52 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-29  0:18 [PATCH] drm/i915: Support 64b relocations Ben Widawsky
2014-04-29  1:11 ` [PATCH] drm/i915: Expand error state's address width to 64b Ben Widawsky
2014-04-29  1:43   ` [PATCH] [v2] " Ben Widawsky
2014-04-29  1:45     ` [PATCH] intel_error_decode: use 64b gtt_offset Ben Widawsky
2014-04-29  8:52       ` Daniel Vetter [this message]
2014-04-29  9:01         ` Daniel Vetter
2014-04-29 10:48           ` Chris Wilson
2014-04-29 11:05             ` Daniel Vetter
2014-04-30  0:54           ` Ben Widawsky
2014-05-01  8:06     ` [PATCH] [v2] drm/i915: Expand error state's address width to 64b Chris Wilson
2014-04-29  2:21   ` [PATCH] [v3] " Ben Widawsky
2014-04-29  2:29   ` [PATCH] drm/i915: Support 64b execbuf Ben Widawsky
2014-05-01  8:12     ` Chris Wilson
2014-05-01 10:18       ` Barbalho, Rafael
2014-05-05 14:02         ` Daniel Vetter
2014-05-01  8:04 ` [PATCH] drm/i915: Support 64b relocations Chris Wilson
2014-05-05 14:06   ` Daniel Vetter

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