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From: Daniel Vetter <daniel@ffwll.ch>
To: Paulo Zanoni <przanoni@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH v2 09/24] drm/i915: Keep vblank interrupts enabled while enabling/disabling planes
Date: Tue, 29 Apr 2014 16:04:25 +0200	[thread overview]
Message-ID: <20140429140425.GT32404@phenom.ffwll.local> (raw)
In-Reply-To: <CA+gsUGRC6F9KCUT5zBFzf2xz1_6eYz3ivD2KYqLB5uSq619t0A@mail.gmail.com>

On Mon, Apr 28, 2014 at 06:42:50PM -0300, Paulo Zanoni wrote:
> 2014-04-28 9:58 GMT-03:00  <ville.syrjala@linux.intel.com>:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Becasue of the upcoming vblank interrupt driven watermark update
> 
> BecaUSe.
> 
> Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> 
> > mechanism we will have use for vblank interrupts during plane
> > enabling/disabling. So don't call drm_vblank_off() until planes
> > are off, and call drm_vblank_on() just before we start to enable
> > the planes.
> >
> > v2: Pimp commit message (Paulo)
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Argh, this depends upon the drm vblank rework in the core, which is still
hanging tight in a topic branch waiting for me to polish it. I'll move
that todo up on my priority list ...

Previous patches should be merged to dinq now (except the one I've noted).
-Daniel

> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 7 ++++---
> >  1 file changed, 4 insertions(+), 3 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 88df4ea..8d2a31e 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -3547,6 +3547,8 @@ static void ilk_crtc_enable_planes(struct drm_crtc *crtc)
> >         int pipe = intel_crtc->pipe;
> >         int plane = intel_crtc->plane;
> >
> > +       drm_vblank_on(dev, pipe);
> > +
> >         intel_enable_primary_plane(dev_priv, plane, pipe);
> >         intel_enable_planes(crtc);
> >         intel_crtc_update_cursor(crtc, true);
> > @@ -3557,8 +3559,6 @@ static void ilk_crtc_enable_planes(struct drm_crtc *crtc)
> >         mutex_lock(&dev->struct_mutex);
> >         intel_update_fbc(dev);
> >         mutex_unlock(&dev->struct_mutex);
> > -
> > -       drm_vblank_on(dev, pipe);
> >  }
> >
> >  static void ilk_crtc_disable_planes(struct drm_crtc *crtc)
> > @@ -3570,7 +3570,6 @@ static void ilk_crtc_disable_planes(struct drm_crtc *crtc)
> >         int plane = intel_crtc->plane;
> >
> >         intel_crtc_wait_for_pending_flips(crtc);
> > -       drm_vblank_off(dev, pipe);
> >
> >         if (dev_priv->fbc.plane == plane)
> >                 intel_disable_fbc(dev);
> > @@ -3581,6 +3580,8 @@ static void ilk_crtc_disable_planes(struct drm_crtc *crtc)
> >         intel_disable_planes(crtc);
> >         intel_disable_primary_plane(dev_priv, plane, pipe);
> >         intel_wait_for_vblank(dev, pipe);
> > +
> > +       drm_vblank_off(dev, pipe);
> >  }
> >
> >  static void ironlake_crtc_enable(struct drm_crtc *crtc)
> > --
> > 1.8.3.2
> >
> 
> 
> 
> -- 
> Paulo Zanoni
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch

  reply	other threads:[~2014-04-29 14:04 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-07 16:32 [PATCH 00/24] drm/i915: Two part watermark update for ILK+ ville.syrjala
2014-03-07 16:32 ` [PATCH 01/24] drm/i915: Don't read sprite LP2+ registers on ILK/SNB ville.syrjala
2014-04-04 21:35   ` Paulo Zanoni
2014-04-05 15:19     ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 02/24] drm/i915: Add some more tracked state to intel_pipe_wm ville.syrjala
2014-04-07 14:14   ` Paulo Zanoni
2014-04-29 11:18     ` Daniel Vetter
2014-04-29 11:20       ` Daniel Vetter
2014-04-29 12:34         ` Paulo Zanoni
2014-04-29 13:57           ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 03/24] drm/i915: Skip watermark merging for inactive pipes ville.syrjala
2014-04-07 16:23   ` Paulo Zanoni
2014-03-07 16:32 ` [PATCH 04/24] drm/i916: Refactor WM register maximums ville.syrjala
2014-04-07 16:34   ` Paulo Zanoni
2014-04-09 12:22     ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 05/24] drm/i915: Merge LP1+ watermarks in safer way ville.syrjala
2014-04-23 19:13   ` Paulo Zanoni
2014-04-23 20:28     ` Ville Syrjälä
2014-04-28 12:44     ` [PATCH 05.1/24] drm/i915: Make sure computed watermarks never overflow the registers ville.syrjala
2014-04-28 12:44       ` [PATCH v2 05.2/24] drm/i915: Merge LP1+ watermarks in safer way ville.syrjala
2014-04-28 21:35         ` Paulo Zanoni
2014-04-28 21:23       ` [PATCH 05.1/24] drm/i915: Make sure computed watermarks never overflow the registers Paulo Zanoni
2014-03-07 16:32 ` [PATCH 06/24] drm/i915: Disable/enable planes as the first/last thing during modeset on ILK+ ville.syrjala
2014-04-07 19:51   ` Paulo Zanoni
2014-04-15 21:23     ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 07/24] drm/i915: Remove useless checks from primary enable/disable ville.syrjala
2014-03-07 21:29   ` Daniel Vetter
2014-03-10 11:20     ` Ville Syrjälä
2014-03-10 11:57       ` Daniel Vetter
2014-04-07 20:04         ` Paulo Zanoni
2014-04-28 12:53     ` [PATCH v2 " ville.syrjala
2014-04-28 21:39       ` Paulo Zanoni
2014-04-30 11:28       ` Chris Wilson
2014-04-30 11:40         ` Ville Syrjälä
2014-04-30 11:43           ` Chris Wilson
2014-04-30 12:34             ` Daniel Vetter
2014-04-30 14:43             ` [PATCH] drm/i915: Make primary_enabled match the actual hardware state ville.syrjala
2014-04-30 16:01               ` Chris Wilson
2014-03-07 16:32 ` [PATCH 08/24] drm/i915: Shuffle wait_for_vblank out of primary_enable/disable funcs ville.syrjala
2014-04-07 20:27   ` Paulo Zanoni
2014-04-08 18:55     ` Ville Syrjälä
2014-04-29 14:00       ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 09/24] drm/i915: Keep vblank interrupts enabled while enabling/disabling planes ville.syrjala
2014-04-07 21:21   ` Paulo Zanoni
2014-04-08 18:19     ` Ville Syrjälä
2014-04-28 12:58     ` [PATCH v2 " ville.syrjala
2014-04-28 21:42       ` Paulo Zanoni
2014-04-29 14:04         ` Daniel Vetter [this message]
2014-03-07 16:32 ` [PATCH 10/24] drm/i915: Leave interrupts enabled while disabling crtcs during suspend ville.syrjala
2014-04-24 13:33   ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 11/24] drm/i915: Check hw vs. sw watermark state after programming ville.syrjala
2014-04-23 21:16   ` Paulo Zanoni
2014-04-29 12:54     ` Ville Syrjälä
2014-03-07 16:32 ` [PATCH 12/24] drm/i915: Refactor ilk_validate_pipe_wm() ville.syrjala
2014-04-23 21:23   ` Paulo Zanoni
2014-03-07 16:32 ` [PATCH 13/24] drm/i915: Refactor ilk_update_wm ville.syrjala
2014-04-23 21:31   ` Paulo Zanoni
2014-03-07 16:32 ` [PATCH 14/24] drm/i915: Add dev_priv->wm.mutex ville.syrjala
2014-04-23 21:47   ` Paulo Zanoni
2014-04-24  8:07     ` Ville Syrjälä
2014-03-07 16:32 ` [PATCH 15/24] drm/i915: Add vblank based delayed watermark update mechanism ville.syrjala
2014-03-07 16:32 ` [PATCH 16/24] drm/i915: Split watermark programming into pre and post steps ville.syrjala
2014-03-07 16:32 ` [PATCH 17/24] drm/i915: Actually perform the watermark update in two phases ville.syrjala
2014-03-07 16:32 ` [PATCH 18/24] drm/i915: Wait for watermark updates to finish before disabling a pipe ville.syrjala
2014-03-07 16:32 ` [PATCH 19/24] drm/i915: Refactor get_other_active_crtc() ville.syrjala
2014-03-07 16:32 ` [PATCH 20/24] drm/i915: Disable LP1+ watermarks while changing the number of active pipes ville.syrjala
2014-03-07 16:32 ` [PATCH 21/24] drm/i915: Keep track of who disabled LP1+ watermarks ville.syrjala
2014-03-07 16:32 ` [PATCH 22/24] drm/i915: Prefer the 5/6 DDB split when primary is disabled ville.syrjala
2014-03-07 16:32 ` [PATCH 23/24] drm/i915: Add a workaround for sprite only <-> primary only switching ville.syrjala
2014-03-07 21:32   ` Daniel Vetter
2014-03-07 16:32 ` [PATCH 24/24] drm/i915: Don't disable LP1+ watermarks for every frame when scaled ville.syrjala

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