From: Damien Lespiau <damien.lespiau@intel.com>
To: Jani Nikula <jani.nikula@intel.com>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH 1/3] drm/i915: consider the source max DP lane count too
Date: Tue, 6 May 2014 14:34:41 +0100 [thread overview]
Message-ID: <20140506133441.GD27926@strange.amr.corp.intel.com> (raw)
In-Reply-To: <1399377412-29193-1-git-send-email-jani.nikula@intel.com>
On Tue, May 06, 2014 at 02:56:50PM +0300, Jani Nikula wrote:
> From: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
> Even if the panel claims it can support 4 lanes, there's the
> possibility that the HW can't, so consider this while selecting the
> max lane count.
>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Note that we also have an eDP lane count in the VBT we may want to factor
in here as well.
--
Damien
next prev parent reply other threads:[~2014-05-06 13:34 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-06 11:56 [PATCH 1/3] drm/i915: consider the source max DP lane count too Jani Nikula
2014-05-06 11:56 ` [PATCH 2/3] drm/i915: clean up VBT eDP link param decoding Jani Nikula
2014-05-06 13:41 ` Damien Lespiau
2014-05-06 11:56 ` [PATCH 3/3] drm/i915: use lane count and link rate from VBT as minimums for eDP Jani Nikula
2014-05-06 13:51 ` Damien Lespiau
2014-05-06 12:55 ` [PATCH 1/3] drm/i915: consider the source max DP lane count too Damien Lespiau
2014-05-06 16:59 ` Jani Nikula
2014-05-06 13:34 ` Damien Lespiau [this message]
2014-05-06 13:39 ` Damien Lespiau
-- strict thread matches above, loose matches on Subject: below --
2014-04-24 21:22 Paulo Zanoni
2014-04-25 7:16 ` Jani Nikula
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