From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH v2] drm/i915: Increase WM memory latency values?on SNB Date: Fri, 9 May 2014 18:38:11 +0300 Message-ID: <20140509153811.GX18465@intel.com> References: <1399550959-4767-1-git-send-email-ville.syrjala@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTP id 870F96E031 for ; Fri, 9 May 2014 08:38:15 -0700 (PDT) Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Robert Navarro Cc: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org On Fri, May 09, 2014 at 03:23:41PM +0000, Robert Navarro wrote: > Thanks for this Ville. > = > Should this apply to 3.14 and 3.15? > = > I'll try it on 3.15 first and report back. I think it should apply to 3.13+. If not directly then with a bit of manual frobbery. Which reminds me that we should perhaps slap a cc stable on it to get it included in 3.13+. For older kernels the patch would have to look totally different, so I'm not going to bother about those. -- = Ville Syrj=E4l=E4 Intel OTC