From mboxrd@z Thu Jan  1 00:00:00 1970
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Subject: Re: [PATCH v3] drm/i915: Added write-enable pte bit
 support
Date: Tue, 13 May 2014 15:05:24 -0700
Message-ID: <20140513150524.4050090c@jbarnes-desktop>
References: <1392108543-31552-1-git-send-email-akash.goel@intel.com>
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On Tue, 11 Feb 2014 14:19:03 +0530
akash.goel@intel.com wrote:

> @@ -810,6 +815,7 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm,
>  		pt_vaddr[act_pte] =
>  			vm->pte_encode(sg_page_iter_dma_address(&sg_iter),
>  				       cache_level, true);
> +
>  		if (++act_pte == I915_PPGTT_PT_ENTRIES) {
>  			kunmap_atomic(pt_vaddr);
>  			pt_vaddr = NULL;

Some extra whitespace here.

Otherwise:
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>

Might be good to expose this as a param too, so userspace could use it
for stuff that shouldn't be written...

-- 
Jesse Barnes, Intel Open Source Technology Center