From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thierry Reding Subject: Re: Design review request: DRM color manager Date: Wed, 14 May 2014 17:54:34 +0200 Message-ID: <20140514155431.GA5743@mithrandir> References: <20140422134757.GO10722@phenom.ffwll.local> <536A41B4.4030800@intel.com> <5370A1E9.3020106@intel.com> <5370B8F9.1040303@intel.com> <20140512152841.GE25056@phenom.ffwll.local> <5371961D.6060807@intel.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="===============0386426311==" Return-path: In-Reply-To: <5371961D.6060807@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: "Sharma, Shashank" Cc: intel-gfx , dri-devel , uma.shankar@intel.com List-Id: intel-gfx@lists.freedesktop.org --===============0386426311== Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="Qxx1br4bt0+wmkIi" Content-Disposition: inline --Qxx1br4bt0+wmkIi Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, May 13, 2014 at 09:18:45AM +0530, Sharma, Shashank wrote: > Daniel, > Please find my comments inline. >=20 > Regards > Shashank > On 5/12/2014 8:58 PM, Daniel Vetter wrote: > >On Mon, May 12, 2014 at 05:35:13PM +0530, Sharma, Shashank wrote: > >>Thanks for your time and the comments David. > >>please find mine inline. > >> > >>Regards > >>Shashank > >>On 5/12/2014 5:20 PM, David Herrmann wrote: > >>>Hi > >>> > >>>On Mon, May 12, 2014 at 12:26 PM, Sharma, Shashank > >>> wrote: > >Gamma correction lut is already supported. For the other stuff we can use > >SET_BLOB (or fix it if it doesn't work). > > > Current gamma correction supports only 8 bit mode, which cant do a real > gamma correction. This is only to initialize the LUT. Actual gamma > correction needs 10 bit support. >=20 > As discussed in design, the idea is same, ie to fix (implement) SET_BLOB. > But see some of the requirements on LUT size of VLV: >=20 > 1. Gamma correction: 256 values > 2. CSC : 9 values in form of 6 register > 3. Hue : 1 value (Plane level) > 4. Saturation: 1 value (Plane level) > 5. Contrast: 1 value (Plane level) > 6. Brightness: 1 value (Plane level) >=20 > For CHV, the requirement is again different. > There are different values, which vary from platform to platform and > property-by-property. > Now, one method of supporting these values is create a DRM property for > each, some blob, some single valued, set individual interface and set them > all at random. IMHO, this looks the non-systematic way of doing it. That's exactly what atomic modeset/pageflip is meant to address. You get the flexibility of individual properties and on top of that a way to apply them all atomically. > The same thing has to be done differently for different platfroms, with s= ome > new color corrections added, some removed, and some no of coefficients > changed. I can clearly see a requirement here. Having them separated into individual properties will make it easy for userspace to determine at runtime which of them are available and which aren't. Also it seems to me that all of these properties should have a unified userspace interface. Drivers would then be free to implement the kernel side with the hardware-specific details. > >>AFAIK color management is not a part of atomic modeset, but once we cre= ate > >>such an interface, it would be really easy to club that in the atomic > >>modeset. > > > >See above, this is a reason to _not_ add a separate color manager. > >-Daniel > > > As I mentioned above, color manager is designed to be clubbed with atomic > modeset, and will not be any blockage there. I think the point here is that once we have atomic modesetting/pageflip then there's no longer a need to have an "atomic" color manager property since there will be a mechanism to atomically apply any number of properties. Thierry --Qxx1br4bt0+wmkIi Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAEBAgAGBQJTc5G3AAoJEN0jrNd/PrOhT/oP/j5du7sXzfjimuujBTw8qbEl XoIsFdJ+gqWjNyuzx43p0iBb+6yUZR22n595oh78LKZSTsgQ8zdSBFvqzU6JTIh3 bO/K/rlbGZZi/6hxIgP9+dG5NhqzsTGaVVOTYAIi1ucWFdJeITNvJ7xWiTqv8MKU gF9U/zVg04Hc7EYxloiEUUUSis5SzI443bz5MlBP5XYfESojFS1yx8+t5cumil7/ F89e73jA1/ZvQoO41XRvfNYx3arJxrhtqDMeDp3NaBQ4EYeYRMHrZix4EUphZsar rOh2d+IW6hLnQZzr4lxtaoTDXA01o4W+rAd4tGsGMpcih2XrXmHaiH5+1PIaXmZS pjp3Mv2JdyfMpQwaX6ndMDW4VDJdI4BKk0XKjjlMYk1M3EfS3w2II6kfy5D0kqx2 qba1L8LbkhY0DQYjMJzVSprMZBZhg4UqCFcMTWsE6DzW6OL37tHmgjqf7IGI73uT nMOB6+cvZPPPxZObpJwcKhEfV/chnYNcZhFWuTvPpFMuArMCSWlIlYthXiSqpg+D CNYAtB8hm61uAaTILVJ80cuUGyU/IPQWKIdjA/C/FV8Z/euJkoexvtCS+sZ5cAqc Ng17qRVxXjuo1gQld8asiYUW+MjekNL+PMmbb2GR99qNRg0XLQh2WQnWhXQsLp4a yOINxam7caamrSPt87fE =vnBB -----END PGP SIGNATURE----- --Qxx1br4bt0+wmkIi-- --===============0386426311== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx --===============0386426311==--